CS8311YDR8 ON Semiconductor, CS8311YDR8 Datasheet - Page 4

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CS8311YDR8

Manufacturer Part Number
CS8311YDR8
Description
IC REG LDO 100MA 10V MPWR 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of CS8311YDR8

Regulator Topology
Positive Fixed
Voltage - Output
10V
Voltage - Input
11 ~ 26 V
Voltage - Dropout (typical)
0.4V @ 100mA
Number Of Regulators
1
Current - Output
100mA
Current - Limit (min)
105mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
CS8311YDR8OS
Output Stage Protection
circuit and thermal runaway conditions (Figure 2).
output shuts down. This response protects the internal
circuitry and enables the IC to survive unexpected voltage
transients.
exceed 180 C (typ) the load current capability is reduced
thereby preventing thermal overload. This thermal
management function is an effective means to prevent die
overheating since the load current is the principle heat
source in the IC.
control functions: ENABLE and RESET (Figure 3).
V
ENABLE
I
The output stage is protected against overvoltage, short
If the input voltage rises above 30 V (e.g. load dump), the
Should the junction temperature of the power device
The CS8311 contains two microprocessor compatible
OUT
VOLTAGE REFERENCE AND OUTPUT CIRCUITRY
RESET
V
OUT
V
IN
Figure 2. Typical Circuit Waveforms for Output
OUT
V
IN
REGULATOR CONTROL FUNCTIONS
V
V
RL
VR
> 30 V
Dump
RH
Load
V
OFF
PEAK
IN(H)
ON
Figure 3. Circuit Waveform
(1) = No Reset Delay Capacitor
(2) = With Reset Delay Capacitor
Stage Protection
For 11 V < V
Current
Limit
(1)
VR
LO
IN
(2)
< 26 V
Circuit
Short
CIRCUIT DESCRIPTION
VR
PEAK
http://onsemi.com
CS8311
4
ENABLE Function
and OFF. When the voltage on the ENABLE lead exceeds
1.4 V typ, the output pass transistor turns off, leaving a high
impedance facing the load. The IC will remain in Sleep
mode, drawing only 50 A (max), until the voltage on this
input drops below the ENABLE threshold.
RESET Function
powers up until V
voltage, or when V
than 1.1 V below the regulated output voltage. A hysteresis
of 50 mV is included in the function to minimize
oscillations.
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for V
as 1.0 V.
a sufficiently long delay for most microprocessor based
applications. RC values can be chosen using the following
formula:
where:
The ENABLE function switches the output transistor ON
A RESET signal (low voltage) is generated as the IC
The RESET output is an open collector NPN transistor,
An external RC network on the lead (Figure 4) provides
R
R
R
C
t
V
V
Delay
TOT
RST
IN
RST
RST
T
CS8311
= RESET threshold.
= P port impedance
Figure 4. RC Network for RESET Delay
= R
= RESET Delay resistor
= RESET Delay capacitor
= V
= desired delay time
R TOT C RST +
RST
SAT
RESET
V
in parallel with R
OUT
of RESET lead (0.7 V @ turn – ON)
OUT
OUT
is within 1.0 V of the regulated output
drops out of regulation, and is lower
R
RST
ln
C
RST
V RST *V OUT
–t Delay
V T *V OUT
IN
C
OUT
5.0 V to P
and System
Power
OUT
to P
RESET
Port
as low

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