LS40K320QPK2 EPCOS Inc, LS40K320QPK2 Datasheet - Page 8

• Manufacturer Part Number: LS40K320QPK2
• Description: VARISTOR 320VRMS 40MM W/STR TABS
• Manufacturer: EPCOS Inc
• Series: HighEr

Specifications of LS40K320QPK2

• Varistor Voltage: 510V
• Current-surge: 40kA
• Number Of Circuits: 1
• Maximum Ac Volts: 320VAC
• Maximum Dc Volts: 420VDC
• Energy: 640J
• Package / Case: Chassis Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: B72240L 321K102; B72240L0321K102; B72240L321K102

Reliability data for CECC approved types
Test
Climatic sequence
Fast temperature cycling
Damp heat, steady state
Solderability
Please read Cautions and warnings and
Important notes at the end of this document.
Strap varistors
HighE, standard, LS40 series
Test methods/conditions
CECC 42 000, test 4.16
The specimen shall be subjected to:
a) dry heat at UCT, 16 h
b) damp heat, 1st cycle:
c) cold, LCT, 2 h
d) damp heat, additional 5 cycles:
Then the specimen shall be stored at
room temperature and normal humidity
for 1 to 2 h.
Thereafter, the change of V
measured. Thereafter, insulation resis-
tance R
to CECC 42 000, test 4.8 at V = 500 V.
IEC 60068-2-14, test Na, LCT/UCT,
dwell time 30 min, 5 cycles
The specimen shall be subjected to
40 ±2 °C, 90 to 95% r. H. for 56 days
without load / with 10% of the maximum
continuous DC operating voltage V
Then stored at room temperature and
normal humidity for 1 to 2 h.
Thereafter, the change of V
measured. Thereafter, insulation resis-
tance R
to CECC 42 000, test 4.8 at V = 500 V.
IEC 60068-2-20, test Ta,
method 1 with modified conditions for
lead-free solder alloys: 245 °C, 3 s:
After dipping the terminals to a depth
of approximately 3 mm from the body
in a soldering bath of 245 °C for 3 s, the
terminals shall be visually examined.
55 °C/25 °C, 93% r. H., 24 h
55 °C/25 °C, 93% r. H., 24 h/cycle.
ins
ins
shall be measured according
shall be measured according
8
11/07
v
v
shall be
shall be
DC
.
Requirement
|
R
|
No visible damage
|
R
The inspection shall be
carried out under adequate
light with normal eyesight or
with the assistance of a
magnifier capable of giving
a magnification of 4 to
10 times. The dipped sur-
face shall be covered with
a smooth and bright solder
coating with no more than
small amounts of scattered
imperfections such as
pinholes or un-wetted or
de-wetted areas. These
imperfections shall not be
concentrated in one area.
∆V/V (1 mA)
∆V/V (1 mA)
∆V/V (1 mA)
ins
ins
≥1 MΩ
≥1 MΩ
|
|
|
≤10%
≤5%
≤10%