78P2351-IGT/F Maxim Integrated Products, 78P2351-IGT/F Datasheet
78P2351-IGT/F
Specifications of 78P2351-IGT/F
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78P2351-IGT/F Summary of contents
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... DESCRIPTION The 78P2351 is Teridian’s second generation Line Interface Unit (LIU) for 155 Mbps (OC-3, STS-3, or STM-1) and 140 Mbps PDH (E4) telecom interfaces. The device is a single chip solution that includes an integrated CDR in the transmit path for flexible NRZ to CMI conversion. ...
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... ADDRESS 1-1: SIGNAL CONTROL REGISTER.........................................................................14 ADDRESS 1-2: ADVANCED TX CONTROL REGISTER 1 .........................................................15 ADDRESS 1-3: ADVANCED TX CONTROL REGISTER 0 .........................................................15 ADDRESS 1-4: MODE CONTROL REGISTER 2 ........................................................................15 ADDRESS 1-5: STATUS MONITOR REGISTER.........................................................................16 Page 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... RECEIVER JITTER TOLERANCE ..........................................................................................................36 RECEIVER JITTER TRANSFER FUNCTION .........................................................................................38 CMI MODE LOSS OF SIGNAL CONDITION ..........................................................................................39 APPLICATION INFORMATION .................................................................................... 39 EXTERNAL COMPONENTS ...................................................................................................................39 (CMI) TRANSFORMER SPECIFICATIONS............................................................................................39 THERMAL INFORMATION .....................................................................................................................39 MECHANICAL SPECIFICATIONS ............................................................................... 40 PACKAGE INFORMATION .......................................................................................... 41 ORDERING INFORMATION Revision History ........................................................................................................................................42 Page ............................................................................................................ 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU 41 Rev. 2.4 ...
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... See TRANSMITTER OPERATION section for more info. REFERENCE CLOCK The 78P2351 requires a reference clock supplied to the CKREFP/N pins. This reference clock is used for clock recovery in the Rx DLL and Tx DLL also used for transmit re-timing in the synchronous transmit modes ...
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... Figure 1: Synchronous clock and data available (Tx CDR bypassed, FIFO enabled off-chip serial transmit clock is not available Figure 2, the 78P2351 can recover a Tx clock from the serial NRZ data input and pass the data through the clock decoupling FIFO. The data is then re-clocked or re-timed using a clean synthesized clock generated from the provided reference clock ...
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... In this mode, the 78P2351 will recover a transmit clock from the serial plesiochronous data and bypass the internal FIFO and re-timing block. This mode is commonly used for mezzanine cards, modules, and any application ...
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... TXOUT1 pin Low Float Transmit Loss of Lock In transmit modes using the integrated CDR, the 78P2351 will declare a loss of lock condition when there is no valid signal detected at the SIDP/N data inputs. Note: The Tx LOL indicator is invalid and undefined when the parallel (nibble) interface is selected ...
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... In SW mode only, a Full Remote (digital) Loopback bit FLBK is also available in the Advanced Tx Control register. This loopback exercises the entire Rx and Tx paths of the 78P2351 including the Tx clock recovery unit. As such, the user must enable either Serial Plesiochronous or Serial Loop-timing transmit modes to utilize the Full Remote (digital) Loopback ...
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... SERIAL CONTROL INTERFACE The serial port controlled register allows a generic controller to interface with the 78P2351 used for mode settings, diagnostics and test, retrieval of status and performance information, and for on-chip fuse trimming during production test. The SPSL pin must be high in order to use the serial port. ...
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... CMI -- -- -- <1> <X> <X> <0> RXLOS <X> <X> <X> <X> 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Bit 2 Bit 1 Bit 0 Sub-Address Read/ Write SA[1] SA[0] R/W* Bit 3 Bit 2 Bit 1 CKSL[ <X> <X> <X> MTLOL <0> ...
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... Secondary values correspond to E4 frequencies. Default values depend on the CKSL pin selection upon reset or power up. Reserved. Register Soft-Reset: When this bit is set, all registers are reset to their default values. This register bit is self-clearing. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... FIERR Error Mask (active low): Gates the respective FIERR register bit to the INTTXB interrupt pin. 0: Mask 1: Pass DESCRIPTION Unused Redundant Channel Enable: Enables transmit monitor outputs at CMI2P/N pins. 0: Disable 1: Enable 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Receive Monitor Mode Enable: 0: Normal Operation 1: Adds 20dB of flat gain to the receive signal before equalization. NOTE: Monitor mode is only available in CMI mode. Reserved 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Default values determined by Default values are determined by Rev. 2.4 ...
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... FIFO is centered after internal VCO clocks and external transmit clocks are stable. NOTES: Transmit monitor port will also be affected by FRST, FIFO resets not required for Plesiochronous Serial Mode 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Use RXP/N and ECLP/N pins for line interface. 1: Coaxial cable (CMI encoded). CMI ENDEC enabled. Optical (NRZ) interface disabled. Use RXP/N and CMIP/N pins for line interface. Reserved. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... This bit is set whenever the internal FERR signal is asserted, indicating that the FIFO is operating at its depth limit reset to 0 when the FRST pin is asserted. 0: Normal operation 1: Transmit FIFO phase error DESCRIPTION Reserved for test. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Used for diagnostics or far end re-timing. Active during reset. Transmit (Optical Mode) LVPECL Data Output: Transmit data outputs used for interfacing with optical transceiver modules when in Fiber (NRZ pass through) mode. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Rx DLL and output a steady clock. Receiver (CMI or NRZ) Input: The input is either transformer-coupled to coaxial cable for CMI data or AC- coupled at LVPECL levels to an optical transceiver module for NRZ data. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Note: The default interrupt condition is a loss of lock in the transmitter CDR. Receiver Fault Interrupt Flag (active-low): Reserved for future use. Power-On Reset (active-low): See Power-On Reset description on use of this pin. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... High: Local Loopback Enable: The serial transmit data is looped back and used as the input to the receiver. • Low: Parallel transmit clock is input to the 78P2351. • Float: Parallel transmit clock is input to the 78P2351. Loop-timing mode enabled. • High: Parallel transmit clock is output from the 78P2351 • ...
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... FR4 trace lengths up to 1.5m. Float: Normal operation High: Normal operation Low: Nominal amplitude Float: 5% amplitude boost High: 10% amplitude boost • Low: 19.44MHz or 17.408MHz • Float: 77.76MHz • High: 155.52MHz or 139.264MHz 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Selects E4 operation (input high) or STM1/STS3 operation (input low) TYPE DESCRIPTION S Power Supply S CMOS I/O Driver Supply G Ground G CMOS I/O Driver Ground Trim Ground G Used during production test. Connect directly to ground. Do not decouple to supply or PORB. 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...
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... Tx Monitor Disabled STM-1 mode; Idde NRZ (optical) mode; Transmitter disabled; STM-1 mode; Iddr CMI mode; Max. cable length; Iddq PDTX=1, PDRX=1 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN NOM MAX UNIT 190 mA 212 160 mA 180 145 ...
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... Type CIU only Rpd Type CID only Cin SYMBOL CONDITIONS Vtil Vtih Rtiz SYMBOL CONDITIONS Vt+ Vt- Iil, Iih Cin 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN NOM MAX 1.9 2.1 2 MIN NOM MAX 0.8 0.4 2.0 ...
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... Reff Tr 10-90% Tf 10-90% SYMBOL CONDITIONS Vpki Vcm Vdd referenced SYMBOL CONDITIONS Vol Iol = 8mA Ipd Logic high output Rpu 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN NOM MAX UNIT 0.4 2 µ MIN NOM MAX UNIT 0.5 ...
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... SA2 SDO Page (continued) SYMBOL CONDITIONS tsu th tprop SCK t prop PA0 PA1 PA2 PA3 D0 D1 Figure 10: Read Operation PA0 PA1 PA2 PA3 Figure 11: Write Operation 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN TYP MAX UNIT MHz t ...
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... Page (continued) SYMBOL CONDITIONS TTCF/TTC PTOCK TPS Parallel mode TPH Parallel mode TSS Serial mode TSH Serial mode TSS TPS TRC = 25.72ns TPS 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN NOM MAX UNIT TSH TPH TTCT TPH Rev ...
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... Plesiochronous or Loop-timing mode. (see Note 1) SYMBOL CONDITIONS TRCF/TRC RSCQ Serial mode RPCQ Parallel mode TRC = 6.43ns TRCT RSCQ TRC = 25.72ns RPCQ 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN NOM MAX UNIT -15 +15 -20 +20 ppm -75 +75 MIN ...
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... Template, steady state 10-90% Negative Transitions Positive Transitions at Interval Boundaries Positive Transitions at mid- interval With respect to CKREF CONDITION Driver is open drain 7MHz to 240MHz 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN NOM MAX UNIT 0.9 1.05 1 -0.1 ...
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... Figure 12 – Mask of a Pulse corresponding to a binary Zero in E4 mode Page (continued 7.18ns 1.795 ns 1ns 0.1ns 0.35ns 0.35ns 1ns 1ns 1.795 ns 1.795 ns (Note 1) 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU (Note 1) Nominal Pulse 1.795 ns 1ns 0.1ns 0.1ns 1ns (Note 1) Rev. 2.4 ...
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... Figure 13 – Mask of a Pulse corresponding to a binary One in E4 mode. Page (continued 7.18ns 0.1ns 3.59ns 1.35ns 1.35ns 1ns 1.795 ns (Note 1) 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU (Note 1) 1ns 0.5ns 0.5ns Nominal Pulse 3.59ns 1ns 1.795 ns Rev. 2.4 ...
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... Figure 14 – Mask of a Pulse corresponding to a binary Zero in STM-1/STS-3 mode. Page (continued 6.43ns 1.608ns 1ns 0.1ns 0.35ns 0.35ns 1ns 1ns 1.608ns 1.608ns (Note 1) 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU (Note 1) Nominal Pulse 1.608ns 1ns 0.1ns 0.1ns 1ns (Note 1) Rev. 2.4 ...
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... Figure 15 – Mask of a Pulse corresponding to a binary One in STM-1/STS-3 mode Page (continued) 6.43ns 0.1ns 3.215ns 1.2ns 1.2ns 1ns 1.608ns (Note 1) 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU (Note 1) 1ns 0.5ns 0.5ns Nominal Pulse 3.215ns 1ns 1.608ns Rev. 2.4 ...
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... CONDITION CMI Mode; 200 Hz to 3.5 MHz, measured with respect to CKREF for 60s NRZ (optical) Mode; 12 kHz to 1.3 MHz, measured with respect to CKREF 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Measured Jitter Amplitude MIN NOM MAX UNIT ...
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... All valid cable lengths. STM-1 mode; CMI mode; 12.7 dB cable loss a) Normal receive mode b) Remote loopback mode 7MHz to 240MHz 1.00E+06 1.00E+07 Frequency (Hz) Worst Case Typical 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN TYP MAX 70 550 0.1 ...
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... ELECTRICAL SPECIFICATIONS RECEIVER JITTER TOLERANCE The 78P2351 exceeds all relevant jitter tolerance specifications shown in Figures 17, 18. STS-3/OC-3 jitter tolerance specifications are in ANSI T1.105.03-1994 and Telcordia GR-253-CORE. tolerance specifications are in ITU-T G.813, G.825, and G.958. specifications are in ITU-T G.825. E4 specifications are found in ITU-T G.823. Receive jitter tolerance is not tested during production test ...
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... Jitter Frequency CONDITION 10Hz to 19.3Hz 19.3Hz to 68.7Hz 68.7Hz to 6.5kHz 6.5kHz to 65kHz 65kHz to 1.3MHz 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Optical (NRZ) Interfaces G.813, G.958, T1.105.03, GR-253 STM-1 / STS-3 / OC-3 Tolerance G.825 - STM-1 Tolerance 100kHz 1MHz 10MHz ...
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... PARAMETER Receiver Jitter transfer function Jitter transfer function roll-off Page (continued) 1.00E+04 1.00E+05 Figure 19: Jitter Transfer CONDITION below 120 kHz 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU 1.00E+06 1.00E+07 MIN NOM MAX UNIT 0 per 20 decade ...
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... Loss of Signal must be cleared Tolerance range LOS can be detected or cleared Loss of Signal must be declared PIN(S) RXP RXN CMIP CMIN No forced air; 4-layer JEDEC test board 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU MIN TYP MAX -35 -19 -15 10 110 255 VALUE ...
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... MECHANICAL SPECIFICATIONS 1 0.60(0.024) TYP. Page 15.70 (0.618) 16.30 (0.641) Top View 13.80 (0.543) 14.20 (0.559) 1.40(0.055) 1.60(0.063) 0.18(0.007) 0.27(0.011) 0.50(0.020)TYP. Side View 100-pin JEDEC LQFP (Top View) 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU 0.05(0.002) 0.15(0.006) Rev. 2.4 ...
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... Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU N/C 75 N/C 74 SCK_MON 73 SEN_CMI 72 SDI_PAR 71 SDO_E4 70 VCC 69 GND 68 INTTXB 67 VCC 66 GND 65 PORB 64 TGND 63 CKSL 62 LOS 61 LOL 60 FRST 59 SPSL 58 N/C 57 VCC 56 GND 55 N/C 54 N/C 53 INTRXB 52 N/C 51 PACKAGE MARK 78P2351-IGT xxxxxxxxxxP6 n/a xxxxxxx-xxx xxxxxxxxxxP6F Rev. 2.4 ...
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... TSC assumes no liability for applications assistance. Teridian Semiconductor Corp., 6440 Oak Canyon, Irvine, CA 92618 TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridiansemiconductor.com Page Revision History 2006 Teridian Semiconductor Corporation 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU Rev. 2.4 ...