71M6521FE-IM/F Maxim Integrated Products, 71M6521FE-IM/F Datasheet - Page 25

• Manufacturer Part Number: 71M6521FE-IM/F
• Description: IC ENERGY METER 32K FLASH 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521FE-IM/F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

71M6521DE/DH/FE Data Sheet
MSB
Timers and Counters
The 80515 has two 16-bit timer/counter registers: Timer 0 and Timer 1. These registers can be configured for counter
or timer operations.
In timer mode, the register is incremented every machine cycle meaning that it counts up after every 12 periods of the
MPU clock signal.
Rev 2
S0CON.7
S0CON.6
S0CON.5
S0CON.4
S0CON.3
S0CON.2
S0CON.1
S0CON.0
S1CON.7
S1CON.5
S1CON.4
S1CON.3
S1CON.2
S1CON.1
S1CON.0
LSB
Bit
Bit
SM
Symbol
Symbol
REN0
REN1
SM20
RB80
SM21
RB81
TB80
TB81
SM0
SM1
RI0
RI1
TI0
SM
TI1
-
Function
These two bits set the UART0 mode:
Enables the inter-processor communication feature.
If set, enables serial reception. Cleared by software to disable reception.
The 9
on the function it performs (parity check, multiprocessor communication etc.)
In modes 2 and 3 it is the 9
stop bit. In mode 0 this bit is not used. Must be cleared by software
Transmit interrupt flag, set by hardware after completion of a serial transfer. Must be
cleared by software.
Receive interrupt flag, set by hardware after completion of a serial reception. Must
be cleared by software
Function
Sets the baud rate for UART1
Enables the inter-processor communication feature.
If set, enables serial reception. Cleared by software to disable reception.
The 9
function it performs (parity check, multiprocessor communication etc.)
In Modes A and B, it is the 9
stop bit. Must be cleared by software
Transmit interrupt flag, set by hardware after completion of a serial transfer. Must be
cleared by software.
Receive interrupt flag, set by hardware after completion of a serial reception. Must
be cleared by software
SM21
Table 17: The S0CON Bit Functions
Table 18: The S1CON Bit Functions
SM
Mode
0
1
th
th
Table 16: The S1CON register
0
1
2
3
transmitted data bit in Modes 2 and 3. Set or cleared by the MPU, depending
transmitted data bit in Mode A. Set or cleared by the MPU, depending on the
REN1
Mode
A
B
Description
8-bit UART
9-bit UART
9-bit UART
N/A
TB81
th
Description
9-bit UART
8-bit UART
th
data bit received. In Mode 1, if SM20 is 0, RB80 is the
data bit received. In Mode B, if SM21 is 0, RB81 is the
RB81
SM0
0
0
1
1
TI1
Baud Rate
variable
variable
SM1
0
1
0
1
RI1
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