71M6515H-IGT/F Maxim Integrated Products, 71M6515H-IGT/F Datasheet - Page 42

• Manufacturer Part Number: 71M6515H-IGT/F
• Description: IC ENERGY METER AFE 3PH 64-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 71M6515H-IGT/F

• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Y_DEG0 (0x18)
Y_DEG1_2 (0x19)
Registers for Output Signals
PULSEW_R_CNTS (0x41)
This register contains the pulse count for the PULSEW and PULSER output pins for the past accumulation interval. The
counters will be cleared at the beginning of each accumulation interval and then start counting up with each generated pulse.
At pulse rates that do not result in generation of whole counts per accumulation interval, e.g. 3 1/3 pulses, the count equivalent
to the next lower natural number will be generated until the residue accumulates to a full count, i.e. the pulse sequence
generated will be 3, 3, 3, 4, 3, 3, 3, 4…
PULSE3_4_CNTS (0x42)
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The 71M6515H performs ADC temperature compensation by computing a gain adjustment factor for both the voltage and
current samples per the following equation:
GAIN_ADJ=16384+floor(1+DELTA_T*PPMC/2
Changes to PPMC1_2 by the host are only allowed if the DEFAULT_PPM bit in the CONFIG register is zero. If additional
temperature compensation by the host, e.g. for external components, is required, the procedure is as follows:
1)
2)
This register holds the constant compensation factor for the RTC temperature compensation. One LSB is equivalent to
0.1PPM.
Bits 31-16: These bits (Y_CALC0) represent the constant compensation factor.
This register holds the linear and quadratic compensation factors for the RTC temperature compensation.
31
Y_CALC1 = linear compensation factor. One LSB is equi-
valent to 0.01PPM/°
Both Y_DEG0 and Y_DEG1_2 can be used to compensate the RTC to be accurate over the whole temperature range by
characterizing the crystal.
Bit 15-0: The counter for the PULSER (VARh) generator.
Bit 31-16: The counter for the PULSEW (Wh) generator.
31
Counter for the PULSEW generator (Wh)
This register contains the pulse count for the PULSE3 and PULSE4 output pins for the accumulation interval. The counters
will be cleared at the beginning of each accumulation interval and then start counting up with each generated pulse.
Bit 15-0: The counter for the PULSE4 generator.
Bit 31-16: The counter for the PULSE3 generator.
31
The host sets the DEFAULT_PPM bit in the CONFIG register to 1 and then reads PPMC and PPMC2.
register to 0 and then writes the modified values to PPMC and PPMC2.
The host then adds the compensation factors to PPMC and PPMC2, resets the DEFAULT_PPM bit in the CONFIG
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14
+DELTA_T
16
16
16
15
Counter for the PULSER generator (VARh)
15
2
*PPMC2/2
15
Y_CALC2 = quadratic compensation factor. One LSB is
equivalent to 0.001PPM/°C
23
)
Energy Meter IC
DATA SHEET
71M6515H
0
0
JULY 2011
1.6
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