ADP3401ARU-REEL Analog Devices Inc, ADP3401ARU-REEL Datasheet - Page 11

• Manufacturer Part Number: ADP3401ARU-REEL
• Description: IC PWR MANAGEMENT GSM 28-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of ADP3401ARU-REEL

• Rohs Status: RoHS non-compliant
• Function: GSM Power Management System
• Rf Type: GSM, DCS, PCS
• Secondary Attributes: 4 LDOs, 3V/5V VSIM
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)
• Battery Type: Li-Ion/NiMH
• Output Voltage: 2.765V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 7V
• Operating Temp Range: -20C to 85C
• Package Type: TSSOP
• Mounting: Surface Mount
• Pin Count: 28
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

Power-On/-Off
ADP3401 handles all issues regarding power-on/-off of the hand-
set. It is possible to turn on the ADP3401 in three different ways:
• Pulling PWRONKEY low
• Pulling PWRONIN high
• CHRON exceeds threshold
Pulling PWRONKEY key low is the normal way of turning on the
handset. This will turn on all the LDOs as long as PWRONKEY is
held low. The microprocessor then starts and pulls PWRONIN
high after which PWRONKEY can be released. PWRONIN going
high will also turn on the handset. This is the case when the alarm
in the RTC module expires.
An external charger can also turn on the phone. The turn-on
threshold and hysteresis can be programmed via external resistors
to allow full flexibility with any external charger and battery chem-
istry. These resistors are referred to as R1 and R2 in Figure 15.
Undervoltage Lockout (ULVO)
The UVLO function in the ADP3401 prevents startup when the
initial voltage of the main battery is below the 3.0 V threshold.
If the battery is this low with no load, there will be little or no
capacity left. When the battery is greater than 3.0 V, as with the
insertion of a fresh battery, the UVLO comparator trips, the
RTC LDO is enabled, and the threshold is reduced to 2.9 V.
This allows the handset to start normally until the battery volt-
age decays to 2.9 V open circuit. Once the 3.0 V threshold is
exceeded, the RTC LDO is enabled. If, however, the backup
coin cell is not connected, or is damaged or discharged below
1.5 V, the RTC LDO will not start on its own. In this situation,
the RTC LDO will be started by enabling the VCC LDO.
Once the system is started, i.e., the phone is turned on and the
VCC LDO is up and running, the UVLO function is entirely
disabled. The ADP3401 is then allowed to run down to very low
battery voltages, typically around 2 V. The battery voltage is
normally monitored by the microprocessor and usually shuts the
phone off at around 3.0 V.
If the phone is off, i.e., the VCC LDO is off, and the battery
voltage drops below 2.9 V, the UVLO circuit disables startup
and the RTC LDO. This is implemented with very low quies-
cent current, typically 3 A, to protect the main battery against
any damage. NiMH batteries can reverse polarity if the 3-cell
battery voltage drops below 3.0 V and a current of more than
about 40 A continues to flow. Lithium ion batteries will lose
their capacity, although the built-in safety circuits normally
present in these cells will most likely prevent any damage.
REV. 0
Figure 19. Schematic for Level Translators
RESETIN
DATAIO
CLKIN
VCC
VCC
VCC
ADP3401
LEVEL
LEVEL
SHIFT
SHIFT
VSIM
VSIM
VSIM
RST
CLK
I/O
–11–
RESET
ADP3401 contains reset circuitry that is active both at power-up
and at power-down. RESET is held low at power-up. An inter-
nal power-good signal starts the reset delay. The delay is set by
an external capacitor on RESCAP:
A 100 nF capacitor will produce a 100 ms reset time. At power-off,
RESET will be kept low to prevent any spurious microprocessor
starts. The current capability of RESET is low (a few hundred nA)
when VCC is off, to minimize power consumption. Therefore,
RESET should only be used to drive a single CMOS input. When
VCC is on, RESET will drive about 15 A.
Overtemperature Protection
The maximum die temperature for ADP3401 is 125 C. If the die
temperature exceeds 160 C, the ADP3401 will disable all the
LDOs except the RTC LDO, which has very limited current capa-
bilities. The LDOs will not be re-enabled before the die tempera-
ture is below 125 C, regardless of the state of PWRONKEY,
PWRONIN, and CHRON. This ensures that the handset will
always power-off before the ADP3401 exceeds its absolute maxi-
mum thermal ratings.
APPLICATIONS INFORMATION
Input Capacitor Selection
For the input voltage, VBAT, of the ADP3401, a local bypass
capacitor is recommended. Use a 5 F to 10 F, low ESR capaci-
tor. Multilayer ceramic chip capacitors provide the best combina-
tion of low ESR and small size, but may not be cost-effective. A
lower cost alternative may be to use a 5 F to 10 F tantalum
capacitor with a small (1 F to 2 F) ceramic in parallel.
LDO Capacitor Selection
The performance of any LDO is a function of the output capaci-
tor. The digital and analog LDOs require a 2.2 F capacitor and
the TCXO LDO requires a 0.22 F capacitor. Larger values
may be used, but the overshoot at startup will increase slightly.
If a larger output capacitor is desired, be sure to check that the
overshoot and settling time are acceptable for the application.
All the LDOs are stable with a wide range of capacitor types and
ESR due to Analog Devices’ anyCAP technology. The ADP3401
is stable with extremely low ESR capacitors (ESR ~ 0), such as
multilayer ceramic capacitors, but care should be taken in their
selection. Note that the capacitance of some capacitor types shows
wide variations over temperature or with dc voltage. A good quality
dielectric, X7R or better, is recommended.
The RTC LDO has a rechargeable coin cell or an electric double-
layer capacitor as a load, but an additional 0.1 F ceramic capaci-
tor is recommended for stability and best performance.
Charge Pump Capacitor Selection
For the input (SIMBAT) and output (VSIM) of the SIM charge
pump, use 10 F low ESR capacitors. The use of low ESR capaci-
tors improves the noise and efficiency of the SIM charge pump.
Multilayer ceramic chip capacitors provide the best combination of
low ESR and small size but may not be cost-effective. A lower cost
alternative may be to use a 10 F tantalum capacitor with a small
(1 F to 2 F) ceramic capacitor in parallel.
t
RESET
1 0 .
nF
ms
C
RESCAP
ADP3401