ADP3402ARU-REEL Analog Devices Inc, ADP3402ARU-REEL Datasheet
ADP3402ARU-REEL
Specifications of ADP3402ARU-REEL
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ADP3402ARU-REEL Summary of contents
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FEATURES Handles all GSM Baseband Power Management Functions Four LDOs Optimized for Specific GSM Subsystems Charges Back-Up Capacitor for Real-Time Clock Charge Pump and Logic Level Translators for 3 V and 5 V GSM SIM Modules Thermally Enhanced 6.1 ...
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ADP3402–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter SHUTDOWN SUPPLY CURRENT VBAT = Low (UVLO Low) VBAT = High (UVLO High) OPERATING GROUND CURRENT VCC, VRTC, VCCA, REFOUT On VCC, VRTC, VCCA, REFOUT and VSIM On All LDOs and VSIM On All LDOs and ...
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Parameter CRYSTAL OSCILLATOR LDO (VTCXO) Output Voltage Line Regulation Load Regulation 3 Output Capacitor Dropout Voltage Ripple Rejection Output Noise Voltage VOLTAGE REFERENCE (REFOUT) Output Voltage Line Regulation Load Regulation Ripple Rejection Maximum Capacitive Load Output Noise Voltage REAL-TIME CLOCK ...
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ADP3402–SPECIFICATIONS Parameter SIM INTERFACE VSIM = 5 V RST RST CLK CLK I/O I/O I/O I/O VSIM = 3 V RST RST CLK CLK I/O I/O I/O I/O I/O Pull-Up Resistance to VSIM Max Frequency (CLK) Prop Delay (CLK) Output ...
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... Package Model Range Description ADP3402ARU – +85 C 28-Lead TSSOP CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3402 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...
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ADP3402 INPUTS UVLO CHRON PWRONKEY Don't care Bold denotes the active control signal. INPUTS VCC Off ...
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PWRONIN, SIMON, AND ANALOGON 250 PWRONIN AND SIMON 200 PWRONIN 150 100 VBAT – V Figure 2. Ground Current vs. Battery Voltage 160 140 120 100 ...
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ADP3402 I LOAD I = 200 A VCC TIME – 200 s/DIV Figure 8. VCC Load Step I LOAD VCCA TIME – 100 s/DIV Figure 9. VCCA Load Step PWRONIN AND ANALOGON (2V/DIV) VCCA (100mV/DIV) VTCXO ...
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VCCA TCXO 400 300 200 REF 100 0 10 100 1k FREQUENCY – Hz Figure 14. Output Noise Density THEORY OF OPERATION The ADP3402 is a power management chip optimized for use with GSM baseband chipsets in handset ...
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ADP3402 300 4-LAYER BOARD = 60 C/W JA 250 VBAT = 5.5V 200 VBAT = 6V 150 100 AMBIENT TEMPERATURE – C Figure 16. Total LDO Load Current vs. Temperature and VBAT Low Dropout ...
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RTC LDO is enabled, and the threshold is reduced to 3.0 V. This allows the handset to start normally until the battery volt- age decays to 3.0 V open circuit. Once the 3.2 V threshold is exceeded, the RTC LDO ...
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ADP3402 Printed Circuit Board Layout Considerations Use the following general guidelines when designing printed circuit boards: 1. Split the battery connection to the VBAT and SIMBAT pins of the ADP3402. Use separate traces for each connection and locate the input ...