AD6459ARS-REEL Analog Devices Inc, AD6459ARS-REEL Datasheet

IC RCVR IF SUBSYS GSM 3V 20-SSOP

AD6459ARS-REEL

Manufacturer Part Number
AD6459ARS-REEL
Description
IC RCVR IF SUBSYS GSM 3V 20-SSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD6459ARS-REEL

Rohs Status
RoHS non-compliant
Function
Receiver IF Subsystem
Frequency
500MHz
Rf Type
Cellular, GSM, IS-54, TETRA, DCS, PCS
Secondary Attributes
3V, Low Power Receiver IF Subsystem
Package / Case
20-SSOP (0.200", 5.30mm Width)
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Not Compliant
a
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The AD6459 is a 3 V, low power receiver IF subsystem for
operation at input frequencies as high as 500 MHz and IFs
from 5 MHz up to 50 MHz. It is optimized for operation in
GSM, DCS1800 and PCS1900 receivers. It consists of a mixer,
an IF amplifier, I and Q demodulators, a phase-locked quadra-
ture oscillator, a precise AGC subsystem, and a biasing system
with external power-down.
The AD6459’s low noise, high intercept mixer is a doubly-
balanced Gilbert-Cell type. It has a nominal –11 dBm input-
referred 1 dB compression point and a 0 dBm input-referred
third-order intercept. The mixer section of the AD6459 also
includes a local oscillator (LO) preamplifier, which lowers the
required LO drive to –16 dBm.
The gain control input accepts an external gain-control voltage
input from an external AGC detector or a DAC. It provides an
80 dB gain range with 27 mV/dB gain scaling.
The I and Q demodulators provide in-phase and quadrature
baseband outputs to interface with Analog Devices’ AD7013
FEATURES
Fully Compliant with Standard and Enhanced GSM
Linear IF Amplifier
Voltage Gain Control
Quadrature Demodulator
Low Power
Interfaces to AD7013, AD7015 and AD6421 Baseband
20-Lead SSOP
Specification
On-Board Phase-Locked Quadrature Oscillator
Demodulates IFs from 5 MHz to 50 MHz
8 mA at Midgain
2 A Sleep Mode Operation
2.7 V to 5.5 V Operation
Converters
Linear-in-dB and Stable over Temperature
–11 dBm Input 1 dB Compression Point
0 dBm Input Third Order Intercept
10 dB SSB Noise Figure (50
DC-500 MHz RF and LO Bandwidths
)
(IS54, TETRA, MSAT) AD7015 and AD6421 (GSM,
DCS1800, PCS1900) baseband converters. An on-board
quadrature VCO that is externally phase-locked to the IF signal
drives the I and Q demodulators. This locked reference signal is
normally provided by an external VCTCXO under the control of
the radio’s digital processor. The AD6459 can also provide
demodulation of N-PSK and N-QAM in many non-TDMA
systems when used with external analog carrier recovery systems
such as the Costas Loop. Finally, the VCO can be phase-locked
to a frequency that is deliberately offset from the IF as in the
case of a Beat-Frequency oscillator (BFO) resulting in the
product detection of CW or SSB.
The AD6459 uses supply voltages from 2.7 V to 5.5 V over the
temperature range of –40 C to +85 C. Operation is enabled by a
CMOS logical level; response time is typically < 80 s. When
disabled, the standby current is reduced to 2 A.
The AD6459 comes in a 20-pin shrink small outline (SSOP)
surface mount package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
GSM 3 V Receiver IF Subsystem
CONTROL
FREF
GAIN
RF
FUNCTIONAL BLOCK DIAGRAM
LO
World Wide Web Site: http://www.analog.com
BPF
© Analog Devices, Inc., 1996
AD6459
AD6459
PLL
Q
I

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AD6459ARS-REEL Summary of contents

Page 1

FEATURES Fully Compliant with Standard and Enhanced GSM Specification –11 dBm Input 1 dB Compression Point 0 dBm Input Third Order Intercept 10 dB SSB Noise Figure (50 DC-500 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB and ...

Page 2

... IF = 19.5 MHz, Using Suggested Filter Power Up on Logical High To Fully Meet Specifications (PLL Lock) To 200 A Supply Current @ V = 1.2 V GAIN Operation to 3.3 V Minimum Supply Voltage Operation to 2.7 V Minimum Supply Voltage = 0.2 V. GAIN –2– AD6459ARS Min Typ Max Units 500 MHz –3 to +16 dB –11 dBm 0 ...

Page 3

... Thermal Characteristics: 20-lead SSOP package: ORDERING GUIDE Temperature Package Model Range Description AD6459ARS – +85 C 20-Pin Plastic for 2 5.5 V SSOP – +85 C for 3 5.5 V Pin Pin Label ...

Page 4

AD6459 FREF R9 50 PRUP LOIP R2 50 RFHI R3 50 GREF OPEN R4 C5 C13 1nF 10nF MXOP VPOS FREF PRUP LOIP RFIP GREF A 0.1µ ...

Page 5

45MHz 13MHz 26MHz 13MHz ...

Page 6

AD6459 0.2V GAIN 1.0V GAIN 1.5V GAIN 2.25V GAIN INTERMEDIATE FREQUENCY – dB Figure 9. IF Amplifier and ...

Page 7

PLL FREQUENCY – MHz Figure 15. PLL Loop Voltage at FLTR Pin (KVCO) vs. Frequency –10 –20 –30 –40 –50 –60 –70 –80 0.5 1.0 1.5 ...

Page 8

AD6459 PRODUCT OVERVIEW The AD6459 provides most of the active circuitry required to realize a complete low power, single-conversion superhetero- dyne receiver, or the latter part of a double-conversion receiver, at input frequencies up to 500 MHz, with an IF ...

Page 9

The output of the mixer is differential. The nominal conversion gain is specified for operation into a 19.5 MHz LC IF bandpass filter as shown in Figure 21 and Table I. The conversion gain is measured between the mixer input ...

Page 10

AD6459 I/Q Demodulators Both demodulators (I and Q) receive their inputs internally from the IF amplifiers. Each demodulator comprises a full-wave synchronous detector followed MHz, two-pole low-pass filter, producing differential outputs at pins IRXP and IRXN, and ...

Page 11

FREF R9 50 LOIP R2 50 RFHI SHORT GREF C5 VPOS 0.1µF R6 24.9k R7 16.9k Figure 27. Evaluation Board as Received with 19.5 MHz Filter Table II. AD6459 Evaluation Board Input and Output Connection Reference Connector ...

Page 12

AD6459 AD6459 EVALUATION BOARD The AD6459 evaluation board (Figure 27) consists of a AD6459, ground plane, I/O connectors, and a 19.5 MHz band pass filter. The RF, LO and FREF ports are terminated provide a broadband match ...

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