ATA3741P2-TGQY Atmel, ATA3741P2-TGQY Datasheet - Page 11

IC UHF ASK/FSK RECEIVER 20SOIC

ATA3741P2-TGQY

Manufacturer Part Number
ATA3741P2-TGQY
Description
IC UHF ASK/FSK RECEIVER 20SOIC
Manufacturer
Atmel
Datasheet

Specifications of ATA3741P2-TGQY

Frequency
300MHz ~ 450MHz
Sensitivity
-108dBm
Data Rate - Maximum
10 kBaud
Modulation Or Protocol
ASK, FSK
Applications
RKE, TPM, Security Systems
Current - Receiving
7mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Other names
ATA3741P2-TGQYTR

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5.2
5.2.1
4899B–RKE–10/06
Polling Mode
Sleep Mode
As shown in
three different modes. In sleep mode, the signal processing circuitry is disabled for the time
period T
nal processing circuits are enabled and settled. In the following bit-check mode, the incoming
data stream is analyzed bit by bit against a valid transmitter signal. If no valid signal is present,
the receiver is set back to sleep mode after the period T
check as it is a statistical process. An average value for T
istics” on page
current consumption in polling mode is dependent on the duty cycle of the active mode and can
be calculated as:
During T
reception of a transmitted command, the transmitter must start the telegram with an adequate
preburst. The required length of the preburst is dependent on the polling parameters T
tup
on the actual bit rate and the number of bits (N
The following formula indicates how to calculate the preburst length.
T
The length of period T
extension factor X
calculated to be:
In US and European applications, the maximum value of T
The time resolution is about 2 ms in that case. The sleep time can be extended to almost half a
second by setting X
a different mode of action as described below:
X
X
as every bit check is OK. If the bit check fails once, this bit is set back to 0 automatically, result-
ing in a regular sleep time. This functionality can be used to save current in the presence of a
modulated disturber similar to an expected transmitter signal. The connected microcontroller is
rarely activated in that condition. If the disturber disappears, the receiver switches back to regu-
lar polling and is again sensitive to appropriate transmitter signals.
As seen in
manent sleep condition. The receiver remains in that condition until another value for Sleep is
programmed into the OPMODE register. This function is desirable where several devices share
a single data line.
I
T
Spoll
Preburst
SleepStd
SleepTemp
Sleep
, T
Bitcheck
=
=
I
------------------------------------------------------------------------------------------------------------
Sleep
Soff
= 1 implies the standard extension factor. The sleep time is always extended.
Sleep
Sleep
T
= 1 implies the temporary extension factor. The extended sleep time is used as long
, and the startup time of a connected microcontroller (T
Sleep
Table 5-6 on page
while consuming a low current of I
Figure 3-2 on page
T
and T
T
Sleep
23. During T
Sleep
+ T
X
Sleep
Sleep
Startup
+
Startup
Sleep
+
I
Son
T
according to
Sleep
Startup
1024
to 8. X
, the receiver is not sensitive to a transmitter signal. To guarantee the
+ T
is defined by the 5-bit word Sleep of the OPMODE register, on the
T
Startup
Bitcheck
+
Startup
T
19, the highest register value of Sleep sets the receiver to a per-
Sleep
T
Bitcheck
Clk
6, the receiver stays in polling mode in a continuous cycle of
and T
+
+ T
Figure 5-4 on page
can be set to 8 by bit X
T
Bitcheck
Start_ C
Bitcheck
the current consumption is I
S
Bitcheck
= I
Soff
) to be tested.
. During the start-up period, T
13, and on the basic clock cycle T
Bitcheck
Sleep
SleepStd
Bitcheck
is about 60 ms if X
is given in
. This period varies check by
or by bit X
Start_µC
). T
“Electrical Character-
S
Bitcheck
SleepTemp
= I
ATA3741
Son
Sleep
. The average
thus depends
Startup
, resulting in
is set to 1.
Sleep
, all sig-
Clk
, T
. It is
Star-
11

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