RFRXD0420T-I/LQ Microchip Technology, RFRXD0420T-I/LQ Datasheet - Page 6

• Manufacturer Part Number: RFRXD0420T-I/LQ
• Description: IC RCVR 315/433MHZ ASK/FSK32LQFP
• Manufacturer: Microchip Technology

Specifications of RFRXD0420T-I/LQ

• Frequency: 300MHz ~ 450MHz
• Sensitivity: -106dBm
• Data Rate - Maximum: 80 kbps
• Modulation Or Protocol: ASK, FM, FSK
• Applications: Home Automation, Remote Sensing, RKE
• Current - Receiving: 9.2mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: DV164102 - KIT DEV RFPICKIT KIT 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -

rfRXD0420/0920
Approximate LNA noise figures are listed in Table 2-3.
TABLE 2-3: LNA NOISE FIGURES
LNA
mately 26 Ω || 2 pF single-ended.
LNA
pulled up to V
Important: To ensure LNA stability the V
must be connected to a low impedance ground.
The LNA pins are illustrated in Figure 2-3.
FIGURE 2-3:
The gain of the LNA can be selected between High and
Low Gain modes by the LNA
is a CMOS input with hysteresis. Table 2-4 summarizes
the voltage levels and modes for LNA gain.
In the High Gain mode the LNA operates normally. In
Low Gain mode the gain of the LNA is reduced approx-
imately 25 dB, reduces total supply current, and
increases maximum input signal levels (see Electrical
Characteristics section for values).
TABLE 2-4: LNA GAIN CONTROL
2.4
MIXER1 performs down-conversion of the RF signal to
the Intermediate Frequency (IF) and is followed by an
IF preamplifier.
1IF
input impedance. The 1IF
4.
DS70090A-page 6
LNA
Note 1: Approximate value
< 0.8 V
> 1.4 V
IN
IN
OUT
(Pin 4) has an approximately 33 Ω single-ended
GAIN
(Pin 31) has an input impedance of approxi-
rfRXD0420
rfRXD0920
LNA
31
MIXER1 and IF Preamp
(Pin 3) has an open-collector output and is
Device
IN
DD
V
V
DD
SS
via a tuned circuit.
BLOCK DIAGRAM OF LNA
PINS
0.8V
5 kΩ
IN
1.6V
High Gain mode
Low Gain mode
pin is illustrated in Figure 2-
Description
GAIN
Noise Figure
pin (Pin 2). LNA
V
TBD
TBD
V
V
SS
SS
DD
SS
LNA
V
pin (Pin 1)
OUT
SS
(1)
3
1
GAIN
Preliminary
The 1IF+ (Pin 6) and 1IF- (Pin 7) are bias connections
to the MIXER1 balanced collectors. Both pins are
open-collector outputs and are individually pulled up to
V
trated in Figure 2-5.
1IF
ended output impedance. The 330 Ω impedance
provides a direct match to low cost ceramic IF filters.
The 1IF
FIGURE 2-4:
FIGURE 2-5:
FIGURE 2-6:
2.5
The IF Limiting Amplifier amplifies and limits the IF
signal at the 2IF
Received Signal Strength Indicator (RSSI) signal
(Pin 21).
2.5.1
Magnitude control circuitry is used in the last stage of
the receiver to keep the signal constant for demodula-
tion. It can consist of a limiting or Automatic Gain
Control (AGC) amplifier. A limiting amplifier is
DD
OUT
by a load resistor. The MIXER1 bias pins are illus-
OUT
(Pin 9) has an approximately 330 Ω single-
1IF+
IF Limiting Amplifier with RSSI
IF LIMITING AMPLIFIER
6
1IF
9
pins is illustrated in Figure 2-6.
1IF
V
4
SS
OUT
IN
20 pF
500 µA
IN
V
V
BLOCK DIAGRAM OF MIXER1
PIN
BLOCK DIAGRAM OF MIXER1
BIAS PINS
BLOCK DIAGRAM OF IF
PREAMP PIN
DD
SS
V
V
pin (Pin 11). It also generates the
DD
SS
V
DD
V
SS
130 Ω
 2003 Microchip Technology Inc.
V
SS
13 Ω
13 Ω
V
V
V
DD
SS
SS
V
DD
500 µA
230 µA
6.8 kΩ
20 pF
500 µA
V
SS
V
DD
1IF-
7