ATA6286N-PNQW Atmel, ATA6286N-PNQW Datasheet - Page 6

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ATA6286N-PNQW

Manufacturer Part Number
ATA6286N-PNQW
Description
IC CTRL/XMITTER 433MHZ 32-VQFN
Manufacturer
Atmel
Datasheet

Specifications of ATA6286N-PNQW

Frequency
433MHz
Applications
TPM (Tire Pressure Monitor)
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
20 kbps
Power - Output
6dBm
Current - Transmitting
8.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Number Of Timers
9
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
 Details
2.5.4
2.5.5
2.5.6
2.5.7
2.5.8
2.5.9
2.5.10
6
ATA6285N/ATA6286N [Preliminary]
Port C (PC2..0)
Port D (PD7..0)
NRESET
LF (2..1)
S (2..0)
ANT(2, 1)
XTO(0, 1)
Port C is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source cur-
rent capability. As inputs, Port C pins that are externally pulled low will source current if the
pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port D is a 7(1)-bit bi-directional I/O port with internal pull-up resistors (selected for each bit).
The PD(6..3) pins are used as internal inter-die connection I/O ports. The Port D output buffers
have symmetrical drive characteristics with both high sink and source current capability. As
inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are
activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock
is not running.
Port D also serves the functions of various special features of the ATmegaT.
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. Shorter pulses then defined minimum pulse length are not
guaranteed to generate a reset.
Input coil pins for the LF-Receiver.
Measuring input pins for external capacitance sensor elements.
RF-Antenna pins.
External crystal for the internal RF transmitter IC.
4958BS–AUTO–01/09

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