ATA5283P-6APJ 71 Atmel, ATA5283P-6APJ 71 Datasheet - Page 6

• Manufacturer Part Number: ATA5283P-6APJ 71
• Description: IC INTRFC WAKE-UP 125KHZ 8TSSOP
• Manufacturer: Atmel

Specifications of ATA5283P-6APJ 71

• Rf Type: TPM
• Frequency: 125kHz
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: ATA5283P-6APJ; ATA5283P-6APJTR

3.5
3.6
3.7
6
Data Output
Wake-up Signal
Reset
ATA5283
Figure 3-5.
The data output N_DATA outputs the demodulated and digitized LF signal according to the
envelope of the antenna input signal. In the standby mode the N_DATA output is disabled and
set to level 1. It is enabled by the wake-up signal and it outputs 1 level if the IC detects the car-
rier signal and a 0 level during the gaps (see
As the circuit does not check the received data (except the preamble), it is up to the user to
choose the kind of encoding (pulse distance, Manchester, bi-phase...) wanted.
The wake-up signal (N_WAKEUP) indicates that the ATA5283 has detected the end of a pream-
ble signal and has left the standby mode. It can be used as a wake-up or a chip select signal for
an external device (see
After a preamble is detected the first valid gap (Start Gap) sets the N_WAKEUP output to low
and enables the data output N_DATA. The N_WAKEUP holds the low level until the IC is reset
to the standby mode by a reset signal.
The IC is reset either by the internal POR circuit during a power on sequence or by a high pulse
at the RESET pin. After the reset all internal counters are in the initial state and the IC is in the
standby listen mode.
The POR circuit generates a reset while the supply voltage V
threshold V
A high signal at the RESET pin resets the complete circuit. If the IC is activated a reset signal is
necessary to activate the standby listen mode.
The RESET pin can also be used to hold the IC in a power down state. In this state the IC is out
of operation and the current consumption is below the standby current.
Note:
The RESET pin is high impedance CMOS input. To avoid floating effects like undefined input
states and malfunctions it should not be open.
POR
Turn Off Delay Time (t
and release the function of the IC if V
200
180
160
140
120
100
Figure 3-1 on page
80
60
40
20
0
0
f
field
= 125 kHz
10
off
) versus Antenna Q-Factor
3).
Figure 3-1 on page
20
Q-factor
max.
min.
DD
30
exceeds this threshold.
DD
3).
40
is below the power on reset
typ.
50
4598H–AUTO–03/07