AS1507-BTDT-100-1K austriamicrosystems, AS1507-BTDT-100-1K Datasheet - Page 11

• Manufacturer Part Number: AS1507-BTDT-100-1K
• Description: IC POT DGTL 100K SERIAL 8TQFN
• Manufacturer: austriamicrosystems

Specifications of AS1507-BTDT-100-1K

• Taps: 256
• Resistance (ohms): 100K
• Number Of Circuits: 2
• Temperature Coefficient: 90 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AS1507-BTDT-100-1KTR

AS1507
Datasheet - D e t a i l e d D e s c r i p t i o n
EEPROM (Non-Volatile Register)
There is an internal EEPROM register implemented to retain the wiper position after power down. During an ongoing
write cycle of the non-volatile register (t
EEPROM is indicated by the READY signal.
Data retention defines the ability of an EEPROM to retain data over time. The qualification has been done according to
JEDEC Retention Lifetime Specification (A117). The EEPROM is cycled to the specified endurance limit before the
data retention test is done. Based on activation energy of 0.6eV the data retention time derates over temperature as
shown in
For the non-volatile register 1M endurance cycles and a data retention of 150 years are typical at 85 ºC. The non-vola-
tile register is factory trimmed to mid-scale.
Power-Up
The AS1507 contains an integrated power-up circuit. At power up, the data are transferred from the non-volatile mem-
ory to the wiper register. The wiper register moves to the stored position. This data transfer takes 5µs after the supply
has reached the POR trigger level.
Programming the Device
Write commands
Copy and Read commands
or 16 clock cycles. At 16 clock cycle commands the 8 data bits (D7:D0) are insignificant.
Table 6. Command/Data Word Format
www.austriamicrosystems.com/Digital-Potentiometers/AS1507
Copy Wiper Register A to Non-
Copy Wiper Register B to Non-
Copy Both Wiper Registers to
Copy Non-Volatile Register A
Copy Non-Volatile Register B
Read Non-Volatile Register A
Read Non-Volatile Register B
Write both Wiper Registers
Write to both Non-Volatile
Copy Both Non-Volatile
Write Wiper Register A
Write Wiper Register B
Non-Volatile Registers
Write to Non-Volatile
Write to Non-Volatile
to Wiper Registers
to Wiper Register
to Wiper Register
Volatile Register
Volatile Register
Read Wiper A
Read Wiper B
Figure 19 on page
Command
Register A
Register B
Registers
Registers
(see Table 6)
(see Table 6)
9.
require 16 clock cycles
C7
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C6
BUSY
2
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
can use 8 clock cycles to clock in the command
C5
time) the system must not be powered down. A write cycle on the
3
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
C4
4
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
0
(see Figure 22 on page 13)
C3
Revision 1.01
5
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
C2
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C1
7
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
C0
8
1
0
1
1
0
1
0
1
1
1
1
0
1
0
1
0
D7
D7
D7
D7
D7
D7
D7
9
-
-
-
-
-
-
-
-
-
-
D6
D6
D6
D6
D6
D6
D6
10
to clock in the command and data.
-
-
-
-
-
-
-
-
-
-
D5
D5
D5
D5
D5
D5
D5
11
-
-
-
-
-
-
-
-
-
-
(see Figure 21 on page 13)
D4
D4
D4
D4
D4
D4
D4
12
-
-
-
-
-
-
-
-
-
-
D3
D3
D3
D3
D3
D3
D3
13
-
-
-
-
-
-
-
-
-
-
D2
D2
D2
D2
D2
D2
D2
14
-
-
-
-
-
-
-
-
-
-
D1
D1
D1
D1
D1
D1
D1
15
-
-
-
-
-
-
-
-
-
-
11 - 18
D0
D0
D0
D0
D0
D0
D0
16
-
-
-
-
-
-
-
-
-
-