XC2V4000-4FF1152I Xilinx Inc, XC2V4000-4FF1152I Datasheet - Page 64

• Manufacturer Part Number: XC2V4000-4FF1152I
• Description: IC FPGA VIRTEX-II 1152FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-IIr

Specifications of XC2V4000-4FF1152I

• Number Of Labs/clbs: 5760
• Total Ram Bits: 2211840
• Number Of I /o: 824
• Number Of Gates: 4000000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1152-BBGA, FCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Logic Elements/cells: -

Table 17: IOB Output Switching Characteristics Standard Adjustments (Continued)
DS031-3 (v3.5) November 5, 2007
Product Specification
HSTL, Class II, 1.8V
HSTL, Class III, 1.8V
HSTL, Class IV, 1.8V
SSTL (Stub Series Terminated Logic), Class I, 1.8V
SSTL, Class II, 1.8V
SSTL, Class I, 2.5V
SSTL, Class II, 2.5V
SSTL, Class I, 3.3V
SSTL, Class II, 3.3V
AGP-2X/AGP (Accelerated Graphics Port)
LVDCI (Low-Voltage Digitally Controlled Impedance), 3.3V
LVDCI, 2.5V
LVDCI, 1.8V
LVDCI, 1.5V
LVDCI, 3.3V, Half-Impedance
LVDCI, 2.5V, Half-Impedance
LVDCI, 1.8V, Half-Impedance
LVDCI, 1.5V, Half-Impedance
HSLVDCI (High-Speed Low-Voltage DCI), 1.5V
HSLVDCI, 1.8V
HSLVDCI, 2.5V
HSLVDCI, 3.3V
GTL (Gunning Transceiver Logic) with DCI
GTL Plus with DCI
HSTL (High-Speed Transceiver Logic), Class I, with DCI
HSTL, Class II, with DCI
HSTL, Class III, with DCI
HSTL, Class IV, with DCI
HSTL, Class I, 1.8V, with DCI
HSTL, Class II, 1.8V, with DCI
HSTL, Class III, 1.8V, with DCI
HSTL, Class IV, 1.8V, with DCI
SSTL (Stub Series Terminated Logic), Class I, 1.8V, with DCI
SSTL, Class II, 1.8V, with DCI
SSTL, Class I, 2.5V, with DCI
SSTL, Class II, 2.5V, with DCI
SSTL, Class I, 3.3V, with DCI
SSTL, Class II, 3.3V, with DCI
R
Description
www.xilinx.com
HSTL_IV_DCI_18
HSTL_III_DCI_18
HSTL_II_DCI_18
IOSTANDARD
HSTL_I_DCI_18
SSTL18_II_DCI
LVDCI_DV2_33
LVDCI_DV2_25
LVDCI_DV2_18
LVDCI_DV2_15
SSTL18_I_DCI
SSTL2_II_DCI
SSTL3_II_DCI
HSTL_IV_DCI
HSTL_III_DCI
SSTL2_I_DCI
SSTL3_I_DCI
HSTL_II_DCI
Virtex-II Platform FPGAs: DC and Switching Characteristics
HSLVDCI_15
HSLVDCI_18
HSLVDCI_25
HSLVDCI_33
HSTL_IV_18
HSTL_I_DCI
HSTL_III_18
HSTL_II_18
GTLP_DCI
SSTL18_II
Attribute
LVDCI_33
LVDCI_25
LVDCI_18
LVDCI_15
SSTL18_I
GTL_DCI
SSTL2_II
SSTL3_II
SSTL2_I
SSTL3_I
AGP
T
T
T
T
T
T
T
T
T
T
OHSTL_III_DCI_18
OHSTL_IV_DCI_18
T
T
T
T
OHSTL_II_DCI_18
T
T
T
T
T
T
T
OHSTL_I_DCI_18
T
T
T
OLVDCI_DV2_33
OLVDCI_DV2_25
OLVDCI_DV2_18
OLVDCI_DV2_15
OSSTL18_II_DCI
T
OSSTL18_I_DCI
Parameter
T
OHSTL_IV_DCI
OSSTL2_II_DCI
OSSTL3_II_DCI
T
OHSTL_III_DCI
OSSTL2_I_DCI
OSSTL3_I_DCI
T
T
T
T
T
OHSLVDCI_15
OHSLVDCI_18
OHSLVDCI_25
OHSLVDCI_33
OHSTL_II_DCI
OHSTL_IV_18
T
OHSTL_I_DCI
OHSTL_III_18
T
T
OHSTL_II_18
T
T
OGTLP_DCI
OSSTL18_II
OSSTL18_I
OLVDCI_33
OLVDCI_25
OLVDCI_18
OLVDCI_15
Timing
OSSTL2_II
OSSTL3_II
OGTL_DCI
OSSTL2_I
OSSTL3_I
T
OAGP
–0.17
–0.16
–0.39
–0.05
–0.15
–0.05
–0.27
–0.31
–0.15
–0.17
–0.46
–0.03
–0.14
–0.41
–0.10
0.20
0.21
0.29
0.74
0.78
0.84
1.82
0.12
0.03
0.42
1.20
1.82
1.05
0.78
0.74
0.23
0.06
0.05
0.36
0.06
0.12
0.15
0.08
-6
Speed Grade
–0.18
–0.16
–0.40
–0.05
–0.16
–0.05
–0.28
–0.32
–0.16
–0.18
–0.47
–0.03
–0.14
–0.42
–0.10
0.20
0.22
0.30
0.77
0.80
0.87
1.88
0.12
0.03
0.43
1.23
1.88
1.08
0.80
0.77
0.23
0.06
0.05
0.37
0.06
0.13
0.16
0.08
-5
–0.20
–0.18
–0.44
–0.06
–0.18
–0.05
–0.31
–0.35
–0.17
–0.20
–0.52
–0.03
–0.16
–0.47
–0.11
0.22
0.24
0.33
0.84
0.88
0.95
2.06
0.13
0.03
0.48
1.36
2.06
1.24
0.88
0.84
0.26
0.07
0.06
0.40
0.07
0.14
0.17
0.09
-4
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
16