M058ZAN Nuvoton Technology Corporation of America, M058ZAN Datasheet - Page 36

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M058ZAN

Manufacturer Part Number
M058ZAN
Description
IC MCU 32BIT 32KB FLASH 33QFN
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro M051™r
Datasheets

Specifications of M058ZAN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
33-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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System Reset Source Register (RSTSRC)
This register provides specific information for software to identify this chip’s reset source from last
operation.
Register
RSTSRC
Bits
[31:8]
[7]
[6]
[5]
RSTS_CPU
31
23
15
7
NuMicro M051
Offset
GCR_BA+04
Descriptions
Reserved
RSTS_CPU
Reserved
RSTS_MCU
Reserved
30
22
14
6
R/W
R/W
RSTS_MCU
Reserved
The RSTS_CPU flag is set by hardware if software writes CPU_RST (IPRSTC1[1]) with a
“1” to rest Cortex-M0 CPU kernel and Flash memory controller(FMC).
1= The Cortex-M0 CPU kernel and FMC are reset by software set CPU_RST to 1.
0= No reset from CPU
This bit is cleared by writing 1 to itself.
Reserved
The RSTS_MCU flag is set by the “reset signal” from the MCU Cortex_M0 kernel to
indicate the previous reset source.
1= The MCU Cortex_M0 had issued the reset signal to reset the system by software
writing 1 to bit SYSRESTREQ(AIRCR[2], Application Interrupt and Reset Control
Register) in system control registers of Cortex_M0 kernel.
29
21
13
5
Description
System Reset Source Register
Series Technical Reference Manual
RSTS_BOD
28
20
12
4
- 36 -
Reserved
Reserved
Reserved
RSTS_LVR
27
19
11
3
Publication Release Date: Sep 14, 2010
RSTS_WDT
26
18
10
2
RSTS_RES
ET
25
17
9
1
Revision V1.2
Reset Value
0x0000_00XX
RSTS_POR
24
16
8
0

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