A2F-EVAL-KIT Actel, A2F-EVAL-KIT Datasheet - Page 4

MCU, MPU & DSP Development Tools Smart Fusion Eval Kit

A2F-EVAL-KIT

Manufacturer Part Number
A2F-EVAL-KIT
Description
MCU, MPU & DSP Development Tools Smart Fusion Eval Kit
Manufacturer
Actel
Datasheet

Specifications of A2F-EVAL-KIT

Processor To Be Evaluated
A2F200M3F-FGG484
Data Bus Width
32 bit
Interface Type
Ethernet, USB, SPI
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A2F-EVAL-KIT
Manufacturer:
ACT
Quantity:
139
4
IGLOO/e
The ultra-low-power programmable solution
The Actel IGLOO family of reprogrammable, full-featured flash FPGAs is designed to meet the demanding power, area and cost requirements of today’s portable
electronics. Based on Actel’s nonvolatile flash technology, the 1.2 V to 1.5 V operating voltage family offers the industry’s lowest power consumption—as low as
5 µW. The IGLOO family supports up to 3,000,000 system gates with up to 504 Kbits of true dual-port SRAM, up to 6 embedded PLLs and up to 620 user
I/Os. Low-power applications that require 32-bit processing can use the ARM
Developed specifically for implementation in FPGAs, Cortex-M1 offers an optimal balance between performance and size to minimize power consumption.
• Ultra-low-power FPGAs
• Flash*Freeze
IGLOO/e Devices
Notes:
1. AES is not available for Cortex-M1 IGLOO devices.
2. AGL060 in CS121 does not support the PLL.
3. Six chip (main) and twelve quadrant global networks are available for AGL060 devices and above.
4. The M1AGL250 device does not support this package.
5. Device/package support TBD.
I/Os Per Package
Notes:
1. The M1AGL250 device does not support QN132 or CS196 packages.
2. Each used differential pair reduces the number of single-ended I/Os available by two.
3. Device/package support TBD.
IGLOO Devices
Cortex-M1 Devices
System Gates
Typical Equivalent
Macrocells
VersaTiles (D-flip-flops)
Flash*Freeze Mode
(typical, µW)
RAM (1,024 bits)
RAM Blocks (4,608 bits)
FlashROM Kbits
(1,024 bits)
Secure (AES) ISP
Integrated PLLs with CCC
VersaNet Globals
I/O Banks
Maximum User I/Os
(packaged device)
Package Pins
IGLOO Devices AGL015 AGL030 AGL060 AGL125
Cortex-M1
Devices
I/O Type
QN48
QN68
UC81
CS81
CS121
VQ100
QN132
CS196
FG144
FG256
CS281
FG484
FG896
UC
CS
QFN
VQFP
FBGA
lowest power consumption
Single-
technology for
Ended
1
3
I/O
49
2
Single-
Ended
I/O
34
49
66
66
77
81
AGL015
15,000
QN68
128
384
49
5
1
6
2
Single-
Ended
96
I/O
96
71
80
3
• 1.2 V core and I/O voltage
• 5 µW Flash*Freeze mode
AGL030
30,000
QN132
VQ100
UC81
CS81
QN48
QN68
256
768
Single-
Ended
81
5
1
6
2
133
I/O
71
84
97
Single-
Ended
143
87
I/O
68
97
M1AGL250
AGL060
FG144
60,000
CS121
QN132
VQ100
1,536
AGL250
3
512
Yes
10
18
18
96
4
1
1
2
Differen-
5
tial I/O
Pairs
19
13
35
24
3
1
AGL125
125,000
CS196
QN132
VQ100
FG144
1,024
3,072
133
Single-
Yes
Ended
16
36
18
8
1
1
2
143
178
194
I/O
97
AGL400
®
Cortex
Differen-
tial I/O
Pairs
• Reprogrammable
• Live at power-up
M1AGL250
35
25
38
38
AGL250
250,000
QN132
CS196
VQ100
FG144
2,048
6,144
143
Yes
24
36
18
-M1 processor without license fee or royalties in M1 IGLOO devices.
8
1
1
4
Single-
Ended
4
4, 5
I/O
177
215
235
97
M1AGL600
AGL600
2
AGL400
400,000
CS196
FG144
FG256
FG484
9,216
Differen-
194
Yes
tial I/O
32
54
12
18
Pairs
1
1
4
25
43
53
60
Single-
Ended
M1AGL600
177
215
300
M1AGL1000
I/O
97
AGL600
600,000
13,824
CS281
FG144
FG256
FG484
AGL1000
108
235
Yes
36
24
18
1
1
4
Differen-
tial I/O
Pairs
25
44
53
74
M1AGL1000
1,000,000
AGL1000
• Secure in-system
• User nonvolatile FlashROM
24,576
CS281
FG144
FG256
FG484
programming (ISP)
144
300
Yes
Single-
53
32
18
Ended
1
1
4
165
270
I/O
AGLE600
Differen-
tial I/O
Pairs
AGLE600
135
79
600,000
13,824
FG256
FG484
108
270
Yes
49
24
18
1
6
8
Single-
Ended
M1AGLE3000
I/O
341
620
AGLE3000
M1AGLE3000
2
AGLE3000
3,000,000
75,264
FG484
FG896
Differen-
137
504
112
620
Yes
18
tial I/O
1
6
8
Pairs
168
310

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