LC4064C-10TN100I Lattice, LC4064C-10TN100I Datasheet - Page 54

• Manufacturer Part Number: LC4064C-10TN100I
• Description: CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD
• Manufacturer: Lattice

Specifications of LC4064C-10TN100I

• Memory Type: EEPROM
• Number Of Macrocells: 64
• Number Of Product Terms Per Macro: 80
• Maximum Operating Frequency: 400 MHz
• Delay Time: 2.5 ns
• Number Of Programmable I/os: 256
• Operating Supply Voltage: 1.8 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 1.95 V
• Supply Voltage (min): 1.65 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispMACH 4128V/B/C Logic Signal Connections: 128-Pin TQFP (Cont.)
ispMACH 4064Z, 4128Z and 4256Z Logic Signal Connections:
132-Ball csBGA
Ball Number Bank Number
B1
B2
C1
C3
C2
D1
D3
D2
E1
E2
Pin Number
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
0
0
0
0
0
0
0
0
-
-
GND (Bank 0)
GLB/MC/Pad
GND
A10
A11
TDI
NC
NC
NC
A8
A9
ispMACH 4064Z
Bank Number
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ORP
A^10
A^11
A^8
A^9
-
-
-
-
-
54
VCCO (Bank 0)
GND (Bank 0)
GLB/MC/Pad
ispMACH 4000V/B/C/Z Family Data Sheet
GND
TDI
B0
B1
B2
B4
B5
B6
ispMACH 4128Z
VCCO (Bank 1)
VCCO (Bank 0)
GND (Bank 0)
GND (Bank 0)
GLB/MC/Pad
H0/GOE1
A0/GOE0
CLK3/I
CLK0/I
VCC
A10
A12
A14
H6
H5
H4
H2
H1
A1
A2
A4
A5
A6
A8
A9
ispMACH 4128V/B/C
ORP
B^0
B^1
B^2
B^3
B^4
B^5
-
-
-
-
VCCO (Bank 0)
GND (Bank 0)
GLB/MC/Pad
GND
C12
C10
TDI
C8
C6
C4
C2
ispMACH 4256Z
ORP
A^11
H^5
H^4
H^3
H^2
H^1
H^0
A^0
A^1
A^2
A^3
A^4
A^5
A^6
A^7
A^8
A^9
-
-
-
-
-
-
-
ORP
C^6
C^5
C^4
C^3
C^2
C^1
-
-
-
-