LCMXO640C-3TN144C Lattice, LCMXO640C-3TN144C Datasheet - Page 32

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LCMXO640C-3TN144C

Manufacturer Part Number
LCMXO640C-3TN144C
Description
CPLD - Complex Programmable Logic Devices 640 LUTS 113 I/O
Manufacturer
Lattice
Datasheet

Specifications of LCMXO640C-3TN144C

Memory Type
SRAM
Number Of Macrocells
320
Delay Time
4.9 ns
Number Of Programmable I/os
113
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Supply Current
17 mA
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA-256-144
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
1.71 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Lattice Semiconductor
sysIO Recommended Operating Conditions
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
LVCMOS 1.5
LVCMOS 1.2
LVTTL
PCI
LVDS
LVPECL
BLVDS
RSDS
1. Inputs on chip. Outputs are implemented with the addition of external resistors.
2. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers
3. Input on the top bank of the MachXO1200 and MachXO2280 only.
3
Standard
1, 2
1
1
1
3.135
2.375
1.425
3.135
3.135
2.375
3.135
2.375
2.375
Min.
1.71
1.14
3-6
V
CCIO
Typ.
3.3
2.5
1.8
1.5
1.2
3.3
3.3
2.5
3.3
2.5
2.5
(V)
DC and Switching Characteristics
MachXO Family Data Sheet
3.465
2.625
1.575
3.465
3.465
2.625
3.465
2.625
2.625
Max.
1.89
1.26

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