SI5364-H-BL Silicon Laboratories Inc, SI5364-H-BL Datasheet - Page 25

• Manufacturer Part Number: SI5364-H-BL
• Description: IC CLK MULT SONET/SDH 99-PBGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5364-H-BL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

*Note: The LVTTL inputs on the Si5364 device have an internal pulldown mechanism that causes the input to default to a logic
Pin #
E10
F10
E2
E1
low state if the input is not driven from an external source.
REF/CLKIN_F+
REF/CLKIN_F–
Pin Name
LOS_A
LOS_B
Table 10. Pin Descriptions (Continued)
I/O
O
O
I*
200–500 mV
(See Table 2)
Signal Level
AC Coupled
LVTTL
LVTTL
Rev. 2.5
PPD
Frequency Reference/Backup Clock Input.
Used by the DSPLL as a frequency reference for
determining the frequency accuracy of the CLKIN_A
and CLKIN_B inputs. If the frequency offset of either
the CLKIN_A or the CLKIN_B inputs relative to REF/
CLKIN_F exceeds the selected frequency offset
threshold, the corresponding Frequency Offset error
flag (FOS_A or FOS_B) is asserted. The frequency
offset threshold is selected with the SMC/S3N input.
In automatic switching mode, Frequency Offset
errors can cause switching of the input clock selec-
tion. (See AUTOSEL pin description.) If the REF/
CLKIN_F signal is not present, the FOS_A and
FOS_B error flags are generated, along with the
LOS_F Loss-of-Signal error flag. The FOS_A and
FOS_B error flags are ignored for the purposes of
automatic switching in the presence of the LOS_F
flag.
The REF/CLKIN_F input can also be utilized as a
third clock input that can be selected by the DSPLL
in the generation of the SONET/SDH compliant clock
outputs. When REF/CLKIN_F is input to the DSPLL
rather than as a frequency accuracy reference for
CLKIN_A and CLKIN_B, the FOS_A or FOS_B fre-
quency offset error outputs can be disabled with the
DSBLFOS control input.
The frequencies of the Si5364 clock outputs are
each a 1, 8, or 32x multiple of the frequency of the
selected clock input. The multiplication ratio is
selected using Frequency Select (FRQSEL) control
pins associated with each clock output. An additional
scaling factor of either 238/255 or 255/238 can be
selected for FEC operation using the FEC[1:0] con-
trol pins.
The clock input frequency is nominally 19.44 MHz.
Clock input frequency can be varied over the range
indicated in Table 3 on page 8 to produce other out-
put frequencies.
Loss-of-Signal (LOS) Alarm for CLKIN_A.
Indicates that the Si5364 detects a missing pulse on
the CLKIN_A clock input signal. The LOS alarm is
cleared after either 100 ms or 13 s of valid CLKIN_A
clock input signal, depending on the setting of the
VALTIME control input.
Loss-of-Signal (LOS) Alarm for CLKIN_B.
See LOS_A.
Description
Si5364
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