PC28F256P30BFA NUMONYX, PC28F256P30BFA Datasheet - Page 43

• Manufacturer Part Number: PC28F256P30BFA
• Description: IC FLASH 256MBIT 100NS 64EZBGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of PC28F256P30BFA

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 256M (16Mx16)
• Speed: 100ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TBGA
• Package: 64EZBGA
• Cell Type: NOR
• Density: 256 Mb
• Architecture: Sectored
• Block Organization: Asymmetrical
• Location Of Boot Block: Bottom
• Typical Operating Supply Voltage: 1.8 V
• Sector Size: 32KByte x 4|128KByte x 255
• Timing Type: Asynchronous|Synchronous
• Interface Type: Parallel|Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 898884; 898884; PC28F256P30BF 898884

P30-65nm
Table 17: End of Wordline Data and WAIT state Comparison
11.2.4
11.2.4.1
Datasheet
43
Latency Count
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
WAIT Polarity
The WAIT Polarity bit (WP), RCR.10 determines the asserted level (V
When WP is set, WAIT is asserted high (default). When WP is cleared, WAIT is asserted
low. WAIT changes state on valid clock edges during active bus cycles (CE# asserted,
OE# asserted, RST# deasserted).
WAIT Signal Function
The WAIT signal indicates data valid when the device is operating in synchronous mode
(RCR.15 =0). The WAIT signal is only “deasserted” when data is valid on the bus.
When the device is operating in synchronous non-array read mode, such as read
status, read ID, or read CFI. The WAIT signal is also “deasserted” when data is valid on
the bus.
WAIT behavior during synchronous non-array reads at the end of word line works
correctly only on the first data access.
When the device is operating in asynchronous page mode, asynchronous single word
read mode, and all write operations, WAIT is set to a deasserted state as determined
by RCR.10. See
page
56, and
Not Supported
Not Supported
Data States
Figure 23, “Asynchronous Page-Mode Read Timing” on page
4
4
4
4
4
4
Figure 22, “Asynchronous Single-Word Read (ADV# Latch)” on
P30-130nm
Not Supported
Not Supported
WAIT States
0 to 1
0 to 2
0 to 3
0 to 4
0 to 5
0 to 6
Not Supported
Not Supported
Data States
16
16
16
16
16
16
16
16
16
16
16
16
16
P30-65nm
Order Number: 320002-10
OH
or V
Not Supported
Not Supported
WAIT States
0 to 10
0 to 11
0 to 12
0 to 13
0 to 14
57.
OL
0 to 2
0 to 3
0 to 4
0 to 5
0 to 6
0 to 7
0 to 8
0 to 9
) of WAIT.
Mar 2010