NAND512W3A2SN6E NUMONYX, NAND512W3A2SN6E Datasheet - Page 21

• Manufacturer Part Number: NAND512W3A2SN6E
• Description: IC FLASH 512MBUT 48TSOP
• Manufacturer: NUMONYX

Specifications of NAND512W3A2SN6E

• Format - Memory: FLASH
• Memory Type: FLASH - NAND
• Memory Size: 512M (64M x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Numonyx SLC SP 70 nm
6.2.2
Figure 8.
6.2.3
RB
I/O
CL
AL
W
R
E
Page read
After the random read access the page data is transferred to the page buffer in a time of
t
goes High. The data can then be read out sequentially (from selected column address to
last column address) by pulsing the Read Enable signal.
Read (A,B,C) operations
Sequential row read
After the data in last column of the page is output, if the Read Enable signal is pulsed and
Chip Enable remains Low, then the next page is automatically loaded into the page buffer
and the read operation continues. A sequential row read operation can only be used to read
within a block. If the block changes a new read command must be issued. Refer to
Sequential row read operations
details about sequential row read operations. To terminate a sequential row read operation,
set to High the Chip Enable signal for more than t
when the Chip Enable don’t care option is enabled.
WHBH
Command
01h/ 50h
code
00h/
(refer to
Table 22
Address input
for value). Once the transfer is complete the Ready/Busy signal
tBLBH1
(read)
and
210403 - Rev 2
Figure 10: Sequential row read block diagrams
Busy
EHEL
Data output (sequentially)
. Sequential row read is not available
Device operations
ai07595c
Figure 9:
for
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