NUTINY-SDK-100 Nuvoton Technology Corporation of America, NUTINY-SDK-100 Datasheet - Page 42

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NUTINY-SDK-100

Manufacturer Part Number
NUTINY-SDK-100
Description
BOARD EVALUATION NUC100 SERIES
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Type
MCUr
Datasheets

Specifications of NUTINY-SDK-100

Contents
Board, Cable
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
NUC100 Series
5.3
5.3.1
5.3.2
The clock controller generates the clocks for the whole chip, including system clocks and all
peripheral clocks. The clock controller also implements the power control function with the
individually clock ON/OFF control, clock source selection and a 4-bit clock divider. The chip will
not enter power-down mode until CPU sets the power down enable bit (PWR_DOWN_EN) and
Cortex-M0 core executes the WFI instruction. After that, chip enter power-down mode and wait for
wake-up interrupt source triggered to leave power-down mode. In the power down mode, the
clock controller turns off the external 4~24 MHz crystal and internal 22.1184 MHz oscillator to
reduce the overall system power consumption.
The clock generator consists of 5 clock sources which are listed below:
Clock Controller
Overview
Clock Generator
One external 32.768 kHz crystal
One external 4~24 MHz crystal
One programmable PLL FOUT(PLL source consists of external 4~24 MHz crystal and
internal 22.1184 MHz oscillator)
One internal 22.1184 MHz oscillator
One internal 10 kHz oscillator
Figure 5-4 Clock generator block diagram
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NuMicro™ NUC100 Data Sheet
Publication Release Date: Nov. 11, 2010
Revision V2.00

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