EVAL_PAN1321 Panasonic - ECG, EVAL_PAN1321 Datasheet
EVAL_PAN1321
Specifications of EVAL_PAN1321
Related parts for EVAL_PAN1321
EVAL_PAN1321 Summary of contents
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Edition 2011-01-18 Published by Panasonic Electronic Devices Europe GmbH Zeppelinstrasse 19 D-21337 Lüneburg, Germany 2011 Panasonic Electronic Devices Europe GmbH © All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a ...
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ENW89811K4CF 22/xx - Infinion’s BlueMoon Revision History: 2011-01-18, Revision 3.1 Previous Version: 2.0 Page Subjects (major changes since last revision) Rev1.0 Initial version Rev2.0 Due to better range with another ceramic antenna, we have updated module height from 1.8mm to ...
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Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Figures Figure 1 Simplified Block Diagram of PAN1321-SPP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Tables Table 1 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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General Device Overview 1.1 Features General • Complete Bluetooth 2.0 + EDR solution – Configurable for BT 1.2 Ultra low power design in 0.13 μm CMOS • • Temperature range from -40°C to 85°C • Integrates ARM7TDMI, RAM and ...
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Block Diagram PAN1321-SPP VDD1 VDD_UART UART GPIO V Voltage supply Regulator Figure 1 Simplified Block Diagram of PAN1321-SPP 1.3 Pin Configuration LGA 1.0 0 ...
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Pin Description The non-shaded cells indicate pins that will be fixed for the product lifetime. Shaded cells indicate that the pin might be removed/changed in future variants. Pins not listed below shall not be connected. Table 1 Pin Description ...
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Table 1 Pin Description Pin Symbol Input / No. Output F4 P0.14 I/O F5 P0.7 / I/O/OD UARTCTS F7 P0.4 / I/O/OD UARTTXD F8 P0.6 / I/O/OD UARTRTS A4, VSUPPLY SI A5 VREG SO F6 VDDUART SI C5 ...
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System Integration PAN1321-SPP is optimized for a low bill of material (BOM) and a small PCB size. application example. Keys, Leds GPIO Oscillator I EEPROM Voltage Regulator VSUPPLY Figure 3 Example of a Bluetooth System using eUniStone User’s Manual ...
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The UART interface is used for communication between the host and PAN1321-SPP. The lines UARTTXD and UARTRXD are used for commands, events and data. The lines UARTRTS and UARTCTS are used for hardware flow control. Low power mode control of ...
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Basic Operating Information 2.1 Power Supply PAN1321-SPP is supplied from a single supply voltage VSUPPLY. This supply voltage must always be present. The PAN1321-SPP chip is supplied from an internally generated 2.5 V supply voltage. This voltage can be ...
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Interfaces 3.1 UART Interface The UART interface is the main communication interface between the host and PAN1321-SPP. The interface consists of four UART signals and two wake-up signals as shown in Host UARTTXD UARTRXD UARTRTS UARTCTS WAKEUP_BT WAKEUP_HOST Figure ...
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General Device Capabilities This chapter describes features available in the PAN1321 (ENW89811K4CF 22/xx) core. Actual feature set and how to access the features can be found in the AT Command document [1]. Release specific performance characteristics, like data speed, ...
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Bluetooth Capabilities 5.1 Supported Features • Bluetooth V2.0 + EDR compliant • Enhanced Data Rate Mbit/s • Adaptive Frequency Hopping (AFH) • All packet types • Authentication, Pairing and Encryption • SPP Device A and B ...
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PAN1321-SPP Specifics and Extensions 5.2.1 During Connection 5.2.1.1 Role Switch Only one role switch can be performed at a time role switch request is pending, other role switch requests on the same or other links are rejected. ...
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RSSI and Output Power Control 5.2.2.1 Received Signal Strength Indication (RSSI) PAN1321-SPP supports received signal strength measurements and uses LMP signaling to keep the output power of a remote device within the golden receive power range. The range is ...
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Electrical Characteristics 6.1 Absolute Maximum Ratings Table 3 Absolute Maximum Ratings Parameter Symbol Storage temperature VSUPPLY supply voltage VDDUART supply voltage VDD1 supply voltage VREG VREG ONOFF Input voltage range Output voltage range ESD Note: Stresses above those listed ...
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DC Characteristics 6.3.1 Pad Driver and Input Stages For more information, see Chapter Table 5 Internal1 (1.5 V) Supplied Pins Parameter Input low voltage Input high voltage Output low voltage Output high voltage 1) Continuous Load Pin Capacitance Magnitude ...
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Table 7 VDDUART Supplied Pins (cont’d) Parameter Symbol Output low voltage Output low voltage Output high voltage Output high voltage 1) Continuous Load Pin Capacitance Magnitude Pin Leakage 1) The totaled continuous load for all VDDUART supplied pins shall not ...
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Pull-ups and Pull-downs Table 10 Pull-up and Pull-down Currents Pin Min. P0.12 260 P0.13 P0.0 22 P0.1 P0.2 P0.3 P0.4 4.2 P0.5 P0.6 P0.7 P0.10 P0.8 P0.9 P0.11 P0.14 P0.15 P1.0 1.1 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 ...
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System Power Consumption Table 11 Max. Load at the Different Supply Voltages Parameter Vsupply Note: I/O currents are not included since they depend mainly on external loads. 6.4 AC Characteristics 6.5 RF Part 6.5.1 Characteristics RF Part The characteristics ...
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Table 12 BDR - Transmitter Part (cont’d) Parameter Symbol Carrier frequency drift (one slot) |fdrift| Carrier frequency drift (three slots) |fdrift| Carrier frequency drift (five slots) |fdrift| Carrier frequency driftrate (one slot) |fdriftrate| Carrier frequency driftrate (three slots) |fdriftrate| Carrier ...
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Table 13 BDR -Receiver Part (cont’d) Parameter Symbol Intermodulation performance Maximum input level Table 14 EDR - Transmitter Part Parameter Output power (high gain) Relative transmit power: PxPSK - PGFSK Carrier frequency stability |ωi| Carrier frequency stability |ωi+ω0| Carrier frequency ...
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Table 15 EDR -Receiver Part (cont’d) Parameter DQPSK - C/I-performance: -1st adjacent channel DQPSK - C/I-performance: co. channel DQPSK - C/I-performance: +1st adjacent channel DQPSK - C/I-performance: +2nd adjacent channel DQPSK - C/I-performance: +3rd adjacent channel 8DPSK - C/I-performance: -4th ...
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Package Information 7.1 Package Marking PAN1321 Ordering Code ENW89811K4CF Date Code YYWWDLL FCC ID:T7VEBMU FCC ID Figure 5 Package Marking 7.2 Production Package Figure 6 Production Package All dimensions are in mm. Tolerances on all outer dimensions, height, width ...
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Pin Mark Pin 1 (A1) is marked on bottom footprint and on the top of the shield on the module according to Diameter of pin 1 mark on the shield is 0.15 mm. PAN1321 22/07 ENW89811K4CF 0902401 FCC ID:T7VEBMU ...
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Important Application Information 8.1 Reference Design Figure 8 Reference Design Schematics User’s Manual Hardware Description Important Application Information 30 Revision 3.1, 2011-01-18 PAN1321-SPP ENW89811K4CF ...
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ENW89811K4CF 22/xx is intended to be installed inside end user equipment. ENW89811K4CF 22/xx is Bluetoooth-qualified and also FCC-certified and Industry Canada approved, and conforms to R&TTE (European) requirements and directives with the reference design described in with the following antennas, ...
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The system antenna used for this module must not exceed 4 dBi. • Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance. Manufacturers of mobile, fixed or portable devices ...
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Declaration of Conformity (DoC) We, Panasonic Electronic Devices Europe GmbH High Frequency Products Business Group Zeppelinstrasse 19, 21337 Lueneburg, Germany declare under our sole responsibility that the product: Type of equipment: Bluetooth 2.0+EDR Module Brand name: PAN1321 / PAN1311 Model ...
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Bluetooth Qualified Design ID Panasonic has submitted End Product Listing (EPL) for PAN1321, based on Infineon eBMU plattform, in the Qualified Product List of the Bluetooth SIG. These EPL are referring the Bluetooth qualfication of the SPP-AT application running ...
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Assembly Guidelines The target of this document is to provide guidelines for customers to successfully introduce the PAN1321-SPP module in production. This includes general description, PCB-design, solder printing process, assembly, soldering process, rework and inspection. 9.1 General Description of ...
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Assembly 9.4.1 Component Placement In order to assure a high yield, good placement on the PCB is necessary rule of thumb the tolerable misplacement is 150 µm. This means that the PAN1321 module can be assembled with ...
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Package PAN1321 is packed in tape on reel according to Figure 13 Tape on Reel User’s Manual Hardware Description Figure 13. 37 PAN1321-SPP ENW89811K4CF Assembly Guidelines Revision 3.1, 2011-01-18 ...
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Soldering Profile Generally all standard reflow soldering processes (vapour phase, convection, infrared) and typical temperature profiles used for surface mount devices are suitable for the PAN1321 module. Wave soldering is not possible. Figure 14 and Figure 15 shows example ...
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At the reflow process each solder joint has to be exposed to temperatures above solder liquids for a sufficient time to get the optimum solder joint quality, whereas overheating the board with its components has to be avoided. Using infrared ...
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Alternative 2: Printing Solder To print solder on the module a fixture must be used. The purpose of the fixture is to get a flat surface and fix the stencil and module for printing. An example of how this ...
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Voids in the Solder Joints 9.9.1 Expected Void Content and Reliability The content of voids is larger on LGA modules than for modules with BGA or leads LGA solder joint the outgassing flux has a longer way ...
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Stencil thickness A thick solder paste stencil means more surface area to the air and thereby easier for the outgassing flux to leave the solder. Temperature soldering profile Too short preheat time means that the flux does not get enough ...
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Terminology A ACK Acknowledgement ARQ Automatic Repeat reQuest B b bit/bits (e.g. kb/s) B Byte/Bytes (e.g. kB/s) BALUN BALanced UNbalanced BD_ADDR Bluetooth Device Address BER Bit Error Rate BMU BlueMoon Universal BOM Bill Of Material BT Bluetooth BW Bandwidth C ...
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Extended Synchronous Connection-Oriented (logical transport) EV Extended Voice (packet type) F FEC Forward Error Correction FHS Frequency Hop Synchronization (packet) FIFO First In First Out (buffer) FM Frequency Modulation FW Firmware G GFSK Gaussian Frequency Shift Keying (modulation) GPIO ...
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MSB Most Significant Bit/Byte MSRS Master-Slave Role Switch Connection NOP No OPeration NVM Non-Volatile Memory O OCF Opcode Command Field OGF Opcode Group Field P PA Power Amplifier PCB Printed Circuit Board PCM Pulse Coded Modulation PDU ...
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TDI Test Data In (JTAG signal) TDO Test Data Out (JTAG signal) TL Transport Layer TMS Test Mode Select (JTAG signal) TX Transmit TXD Transmit Data (UART signal) U UART Universal Asynchronous Receiver & Transmitter ULPM Ultra Low Power Mode ...
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References [1] SPP-AT Application on PAN1311; Software Version 1.1; Release Notes; Rev3.0 (PAN1311_SPP_AT_V10.03_V1.1_RN_Rev3.0.pdf) [2] SPP-AT User's Manual Software Description ; Rev3.0 (PAN1311_SPP_AT_V10.03_V1.1_UM_SD_Rev3.0.pdf) User’s Manual Hardware Description 47 Revision 3.1, 2011-01-18 PAN1321-SPP ENW89811K4CF References ...
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Published by Panasonic Electronic Devices Europe GmbH ...