74HCT107N NXP Semiconductors, 74HCT107N Datasheet

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DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT107 Dual JK flip-flop with reset; negative-edge trigger Product specification File under ...

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Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger FEATURES Output capability: standard I category: flip-flops CC GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in ...

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Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger PIN DESCRIPTION PIN NO. SYMBOL 1J, 2J GND 12, 9 1CP, 2CP 13, 10 1R, 2R ...

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Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger Fig.4 Functional diagram. FUNCTION TABLE OPERATING MODE asynchronous reset toggle load “0” (reset) load “1” (set) hold “no change” Note HIGH voltage level h = HIGH voltage level ...

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Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC AC CHARACTERISTICS FOR 74HC GND = ...

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Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC Note to HCT types The value of additional quiescent supply current ...

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Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger AC WAVEFORMS The shaded areas indicate when the input is permitted to change for predictable output performance GND ...