PIC24FJ16GA004-I/PT Microchip Technology, PIC24FJ16GA004-I/PT Datasheet - Page 36

IC, 16BIT MCU, PIC24F, 32MHZ, TQFP-44

PIC24FJ16GA004-I/PT

Manufacturer Part Number
PIC24FJ16GA004-I/PT
Description
IC, 16BIT MCU, PIC24F, 32MHZ, TQFP-44
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ16GA004-I/PT

Controller Family/series
PIC24
No. Of I/o's
35
Ram Memory Size
4KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
16KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Package
44TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164335 - MODULE SKT FOR 10X10 PM3 44TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
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PIC24FJ16GA004-I/PT
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Microchip Technology
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PIC24FJXXXGA0XX
TABLE 5-1:
5.2.4
All commands supported by the programming executive
are described in Section 5.2.5 “SCHECK Command”
through Section 5.2.12 “QVER Command”.
5.2.5
DS39768D-page 36
Legend: TBD = To Be Determined
Note 1:
15
Opcode
Length
Opcode Mnemonic
Dh
Ah
Bh
0h
1h
2h
3h
4h
5h
7h
8h
9h
Opcode
Field
SCHECK
READC
READP
RESERVED
PROGC
PROGP
RESERVED
RESERVED
RESERVED
QBLANK
QVER
PROGW
12 11
One row of code memory consists of (64) 24-bit words. Refer to Table 2-3 for device-specific information.
COMMAND DESCRIPTIONS
SCHECK COMMAND
PROGRAMMING EXECUTIVE COMMAND SET
0h
1h
(16-bit words)
Length
N/A
N/A
N/A
N/A
Description
99
1
3
4
4
3
1
4
Length
Time-out
1 ms/row
1 ms
1 ms
5 ms
5 ms
1 ms
5 ms
TBD
N/A
N/A
N/A
N/A
0
Sanity check.
Read an 8-bit word from the specified Device ID register.
Read N 24-bit instruction words of code memory starting from
the specified address.
Write an 8-bit word to the specified Device ID registers.
Program one row of code memory at the specified address,
then verify.
Query the programming executive software version.
Program one instruction word of code memory at the specified
address, then verify.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
Query if the code memory is blank.
The SCHECK command instructs the programming
executive to do nothing but generate a response. This
command is used as a “Sanity Check” to verify that the
programming executive is operational.
Expected Response (2 words):
(1)
Note:
1000h
0002h
This instruction is not required for
programming
development purposes only.
Description
© 2008 Microchip Technology Inc.
but
is
provided
for

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