EFM32-G890-SK-F128 Energy Micro, EFM32-G890-SK-F128 Datasheet - Page 4

• Manufacturer Part Number: EFM32-G890-SK-F128
• Description: MCU, CORTEX-M3, EFM32-G890 SAMPLE-PK
• Manufacturer: Energy Micro

Specifications of EFM32-G890-SK-F128

• Controller Family/series: ARM Cortex-M3
• Core Size: 32bit
• Interface: I2C, SPI, UART
• Peripherals: ADC, ACMP, DAC, DMA, POR, RTC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.1.8 Watchdog (WDOG)
2.1.9 Peripheral Reflex System (PRS)
2.1.10 External Bus Interface (EBI)
2.1.11 Inter-Integrated Circuit Interface (I2C)
2.1.12 Universal Synchronous/Asynchronous Receiver/Transmitter (US-
ART)
2.1.13 Pre-Programmed Serial Bootloader
2.1.14 Universal Asynchronous Receiver/Transmitter (UART)
2010-12-17 - d0009_Rev1.20
peripheral modules in addition to enable/disable and configure the available oscillators. The high degree
of flexibility enables software to minimize energy consumption in any specific application by not wasting
power on peripherals and oscillators that are inactive.
The purpose of the watchdog timer is to generate a reset in case of a system failure, to increase appli-
cation reliability. The failure may e.g. be caused by an external event, such as an ESD pulse, or by a
software failure.
The Peripheral Reflex System (PRS) system is a network which lets the different peripheral module
communicate directly with each other without involving the CPU. Peripheral modules which send out
Reflex signals are called producers. The PRS routes these reflex signals to consumer peripherals which
apply actions depending on the data received. The format for the Reflex signals is not given, but edge
triggers and other functionality can be applied by the PRS.
The External Bus Interface provides access to external parallel interface devices such as SRAM, FLASH,
ADCs and LCDs. The interface is memory mapped into the address bus of the Cortex-M3. This enables
seamless access from software without manually manipulating the IO settings each time a read or write
is performed. The data and address lines are multiplexed in order to reduce the number of pins required
to interface the external devices. The timing is adjustable to meet specifications of the external devices.
The interface is limited to asynchronous devices.
The I
both a master and a slave, and supports multi-master buses. Both standard-mode, fast-mode and fast-
mode plus speeds are supported, allowing transmission rates all the way from 10 kbit/s up to 1 Mbit/s.
Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant system.
The interface provided to software by the I
process and close to automatic transfers. Automatic recognition of slave addresses is provided in all
energy modes.
The Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible
serial I/O module. It supports full duplex asynchronous UART communication as well as RS-485, SPI,
MicroWire and 3-wire. It can also interface with ISO7816 SmartCards and IrDA devices.
The bootloader presented in application note AN0003 is pre-programmed in the device at factory. Auto-
baud and destructive write are supported. The autobaud feature, interface and commands are described
further in the application note.
The Universal Asynchronous serial Receiver and Transmitter (UART) is a very flexible serial I/O module.
It supports full- and half-duplex asynchronous UART communication.
2
C module provides an interface between the MCU and a serial I
2
C module, allows both fine-grained control of the transmission
...the world's most energy friendly microcontrollers
4
2
C-bus. It is capable of acting as
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