ADP2303ARDZ Analog Devices Inc, ADP2303ARDZ Datasheet - Page 16

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ADP2303ARDZ

Manufacturer Part Number
ADP2303ARDZ
Description
IC, BUCK, REG, 3A, 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADP2303ARDZ

Primary Input Voltage
20V
No. Of Outputs
1
Output Current
3A
Voltage Regulator Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +125°C
Adjustable Output Voltage Max
24V
Adjustable
RoHS Compliant
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes

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APPLICATIONS INFORMATION
PROGRAMMING OUTPUT VOLTAGE
ADP2302/ADP2303 have an adjustable version where the output
voltage is programmed through an external resistive divider, as
shown in Figure 45. Suggested resistor values for the typical
output voltage setting are listed in Table 6. The output voltages
are calculated using the following equation:
where:
V
R
R
Table 6. Suggested Values for Resistive Voltage Divider
V
1.2
1.5
1.8
2.5
3.3
5.0
VOLTAGE CONVERSION LIMITATIONS
There are both lower and upper output voltage limitations for a
given input voltage due to the minimum on time, the minimum
off time, and the bootstrap dropout voltage.
The lower limit of the output voltage is constrained by the
controllable minimum on time, which can be as high as 170 ns
for the worst case. By considering the variation of both the switch-
ing frequency and the input voltage, the equation for the lower
limit of the output voltage is
where:
V
f
t
V
ADP2302/ADP2303
SW(max)
MIN-ON
TOP
BOT
OUT
OUT
IN(max)
D
Figure 45. Programming the Output Voltage Using a Resistive Voltage Divider
is the diode forward drop.
is the feedback resistor from V
is the feedback resistor from FB to GND.
(V)
V
V
is the output voltage.
OUT(min)
OUT
is the minimum controllable on time.
is the maximum switching frequency for the worst case.
is the maximum input voltage.
=
ADP2302/
ADP2303
. 0
= t
800
MIN-ON
R
10
10
12.7
21.5
31.6
52.3
TOP
V
×
(kΩ), ±1%
× f
1
FB
SW(max)
+
R
R
TOP
BOT
× (V
R
OUT
IN(max)
BOT
R
TOP
to FB.
+ V
R
20
11.3
10.2
10.2
10.2
10
BOT
V
D
) − V
OUT
(kΩ), ±1%
D
Rev. 0 | Page 16 of 28
The upper limit of the output voltage is constrained by the mini-
mum controllable off time, which can be as high as 280 ns in
ADP2302/ADP2303 for the worst case. By considering the
variation of both the switching frequency and the input voltage,
the equation for the upper limit of the output voltage is
where:
V
f
V
t
In addition, the bootstrap circuit limits the minimum input voltage
for the desired output due to the internal dropout voltage. To
attain stable operation at light loads and ensure proper startup for
the prebiased condition, the ADP2302/ADP2303 require the
voltage difference between the input voltage and the regulated
output voltage (or between the input voltage and the prebias
voltage) to be greater than 2.1 V for the worst case. If the voltage
difference is smaller, the bootstrap circuit relies on some minimum
load current to charge the boost capacitor for startup. Figure 46
shows the typical required minimum input voltage vs. load current
for the 3.3 V output voltage.
Based on three conversion limitations (the minimum on time,
the minimum off time, and the bootstrap dropout voltage),
Figure 47 shows the voltage conversion limitations.
SW(max)
MIN-OFF
IN(min)
D
is the diode forward drop.
V
5.3
5.1
4.9
4.7
4.5
4.3
4.1
3.9
3.7
3.5
OUT(max)
is the maximum switching frequency for the worst case.
is the minimum input voltage.
is the minimum controllable off time.
1
Figure 46. Minimum Input Voltage vs. Load Current
= t
FOR START UP
MIN-OFF
OPERATION
10
× f
WHILE IN
OUPTUT CURRENT (mA)
SW(max)
× (V
100
IN(min)
+ V
D
) − V
1000
D

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