UC3853N UNITRODE, UC3853N Datasheet - Page 4

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UC3853N

Manufacturer Part Number
UC3853N
Description
IC, POWER FACTOR PREREG, 3853, DIP8
Manufacturer
UNITRODE
Datasheet

Specifications of UC3853N

Primary Input Voltage
40V
No. Of Outputs
1
Output Voltage
17.5V
Voltage Regulator Case Style
DIP
No. Of Pins
8
Operating Temperature Range
0°C To +70°C
Operating Temperature Max
70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIN DESCRIPTIONS
FB: Voltage Amplifier Inverting Input, Overvoltage
Comparator Input, Sync Input. This pin serves three
functions. FB accepts a fraction of the power factor
corrected output voltage through a voltage divider, and is
nominally regulated to 3V. FB voltages 5% greater than
nominal will trip the overvoltage comparator, and shut
down the output stage until the output voltage drops 5%.
The internal oscillator can be synchronized through FB by
injecting a 2V clock signal though a capacitor. To prevent
false tripping of the overvoltage comparator, the clock
signal must have a fast falling edge, but a slow rising
edge. See Application Note U-159 for more information.
GND: Ground. All voltages are measured with respect to
GND. The VCC bypass capacitor should be connected to
ground as close to the GND pin as possible.
IAC: AC Waveform Input. This input provides voltage
waveform information to the multiplier. The current loop
will try to produce a current waveform with the same
shape as the IAC signal. IAC is a low impedance input,
nominally at 2V, which accepts a current proportional to
the input voltage. Connect a resistor from the rectified in-
put line to IAC which will conduct 500mA at maximum line
voltage.
IMO: Multiplier Output and Current Sense Inverting Input.
The output of the multiplier and the inverting input of the
current amplifier are connected together at IMO. Avoid
bringing this input below –0.5V to prevent the internal pro-
tection diode from conducting. The multiplier output is a
current, making this a summing node and allowing a dif-
ferential current error amplifier configuration to reject
ground noise. The input resistance at this node should be
3.9k to minimize input bias current induced offset voltage.
See the Applications section for the recommended circuit
configuration.
OUT: Gate Driver Output. OUT provides high current gate
drive for the external power MOSFET. A 15V clamp pre-
4
vents excessive MOSFET gate-to-source voltage so that
the UC3853 can be operated with VCC and high as 40V.
A series gate resistor of at least 5 ohms should be used
to minimize clamp voltage overshoot. In addition, a
Schottky diode such as a 1N5818 connected between
OUT and GND may be necessary to prevent parasitic
substrate diode conduction.
ICOMP: Current Loop Error Amplifier Output. The cur-
rent loop error amplifier is a conventional operational
amplifier with a 150 A current source class A output
stage. Compensate the current loop by placing an im-
pedance between ICOMP and IMO. This output can
swing above the oscillator peak voltage, allowing zero
duty cycle when necessary.
VCC: Input Supply Voltage. This pin serves two func-
tions. It supplies power to the chip, and an input voltage
level signal to the squarer circuit. When this input is con-
nected to a DC voltage proportional to the AC input RMS
voltage, the voltage loop gain is reduced by
This configuration maintains constant loop gain. The
UC3853 input voltage range extends from 12V to 40V,
allowing an AC supply voltage range in excess of 85VAC
to 265VAC. Bypass VCC with at least a 0.1 F ceramic
capacitor to ensure proper operation. See the Applica-
tions section for the recommended circuit configuration.
VCOMP: Voltage Loop Error Amplifier Output. The
voltage loop error amplifier is a transconductance type
operational amplifier. A feedback impedance between
VCOMP and FB for loop compensation must be avoided
to maintain proper operation of the overvoltage
protection comparator. Instead, compensate the voltage
loop with an impedance between VCOMP and GND.
When VCOMP is below 1.5V, the multiplier output
current is zero.
++
.
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