AD532SD Analog Devices Inc, AD532SD Datasheet

AD532SD

Manufacturer Part Number

AD532SD

Description

Multiplexer IC

Manufacturer

Analog Devices Inc

Datasheets

1.AD532SH-883B.pdf (8 pages)

2.AD532SD.pdf (7 pages)

Specifications of AD532SD

Ic Function

Analog Multiplier/Divider IC

Package/case

14-CDIP

Accuracy

1 %

Leaded Process Compatible

Number Of Channels

Output Voltage

13V

Peak Reflow Compatible (260 C)

Supply Voltage Max

18V

Rohs Status

RoHS non-compliant

Function

Analog Multiplier/Divider

Number Of Bits/stages

4-Quadrant

Package / Case

14-CDIP (0.300", 7.62mm)

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Available stocks

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Price

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Bonase Electronics (HK) Co., Limited

Part Number:

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Company:

Bonase Electronics (HK) Co., Limited

Part Number:

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PRODUCT DESCRIPTION

The AD532 is the first pretrimmed single chip monolithic multi-

plier/divider. It guarantees a maximum multiplying error of

external trimming resistors or output op amp. Because the

AD532 is internally trimmed, its simplicity of use provides

design engineers with an attractive alternative to modular multi-

pliers, and its monolithic construction provides significant ad-

vantages in size, reliability and economy. Further, the AD532

can be used as a direct replacement for other IC multipliers that

require external trim networks (such as the AD530).

FLEXIBILITY OF OPERATION

The AD532 multiplies in four quadrants with a transfer func-

tion of (X

a 10 V Z/(X

quadrant with a transfer function of

these basic functions, the differential X and Y inputs provide

significant operating flexibility both for algebraic computation and

transducer instrumentation applications. Transfer functions,

such as XY/10 V, (X

are easily attained and are extremely useful in many modulation

and function generation applications, as well as in trigonometric

calculations for airborne navigation and guidance applications,

where the monolithic construction and small size of the AD532

offer considerable system advantages. In addition, the high

CMRR (75 dB) of the differential inputs makes the AD532

especially well qualified for instrumentation applications, as it

can provide an output signal that is the product of two transducer-

generated input signals.

REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

1.0% and a 10 V output voltage without the need for any

FEATURES

Pretrimmed to

No External Components Required

Guaranteed

Diff Inputs for (X

Monolithic Construction, Low Cost

APPLICATIONS

Multiplication, Division, Squaring, Square Rooting

Algebraic Computation

Power Measurements

Instrumentation Applications

Available in Chip Form

– X

)(Y

) transfer function, and square roots in one

1.0% max 4-Quadrant Error (AD532K)

1.0% (AD532K)

– Y

– X

)/10 V, X

)/10 V, divides in two quadrants with

) (Y

– Y

)/10 V Transfer Function

/10 V and 10 V Z/(X

10 V Z. In addition to

– X

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

GUARANTEED PERFORMANCE OVER TEMPERATURE

The AD532J and AD532K are specified for maximum multi-

plying errors of 2% and 1% of full scale, respectively at

+25 C, and are rated for operation from 0 C to +70 C. The

AD532S has a maximum multiplying error of 1% of full scale

at +25 C; it is also 100% tested to guarantee a maximum error

of 4% at the extended operating temperature limits of –55 C

and +125 C. All devices are available in either the hermetically-

sealed TO-100 metal can, TO-116 ceramic DIP or LCC packages.

J, K and S grade chips are also available.

ADVANTAGES OF ON-THE-CHIP TRIMMING OF THE

MONOLITHIC AD532

1. True ratiometric trim for improved power supply rejection.

2. Reduced power requirements since no networks across sup-

3. More reliable since standard monolithic assembly techniques

4. High impedance X and Y inputs with negligible circuit

5. Differential X and Y inputs for noise rejection and additional

plies are required.

can be used rather than more complex hybrid approaches.

computational flexibility.

Integrated Circuit Multiplier

OUT

(Not to Scale)

TOP VIEW

AD532

–V

NC = NO CONNECT

PIN CONFIGURATIONS

World Wide Web Site: http://www.analog.com

Internally Trimmed

(Not to Scale)

TOP VIEW

GND

10 11 12 13

AD532

20 19

OUT

–V

NC = NO CONNECT

(Not to Scale)

GND

TOP VIEW

AD532

GND

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