AD669BR Analog Devices Inc, AD669BR Datasheet - Page 6

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AD669BR

Manufacturer Part Number
AD669BR
Description
IC,D/A CONVERTER,SINGLE,16-BIT,BICMOS,SOP,28PIN
Manufacturer
Analog Devices Inc
Series
DACPORT®r
Datasheet

Specifications of AD669BR

Rohs Compliant
NO
Rohs Status
RoHS non-compliant
Settling Time
10µs
Number Of Bits
16
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Dual ±
Power Dissipation (max)
625mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Converter Type
DAC
Current, Output
5 mA (Min.)
Number Of Pins
28
Package Type
SOIC
Power Dissipation
365 mW (Typ.)
Resolution
16 Bits (Min.)
Temperature, Operating, Maximum
85 °C
Temperature, Operating, Minimum
-40 °C
Voltage, Input, High Level
2 V (Min.)
Voltage, Input, Low Level
0 to 0.8 V
Voltage, Output
0 to +10 V (Unipolar), -10 to +10 V (Bipolar)
Voltage, Range
+13.5 to +16.5 V
Resolution (bits)
16bit
Sampling Rate
167kSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
13.5V To 16.5V
Supply Current
12mA
Digital Ic Case Style
SOIC
Lead Free Status / RoHS Status

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AD669
If it is desired to adjust the gain and offset errors to zero, this
can be accomplished using the circuit shown in Figure 3b. The
adjustment procedure is as follows:
STEP1 . . . ZERO ADJUST
Turn all bits OFF and adjust zero trimmer, R4, until the output
reads 0.000000 volts (1 LSB = 153 V).
STEP 2 . . . GAIN ADJUST
Turn all bits ON and adjust gain trimmer, R1, until the output
is 9.999847 volts. (Full scale is adjusted to 1 LSB less than the
nominal full scale of 10.000000 volts).
BIPOLAR CONFIGURATION
The circuit shown in Figure 4a will provide a bipolar output
voltage from –10.000000 V to +9.999694 V with positive full
scale occurring with all bits ON. As in the unipolar mode, resis-
tors R1 and R2 may be eliminated altogether to provide AD669
bipolar operation without any external components. Eliminating
these resistors will increase the gain error by 0.50% of FSR in
the bipolar mode.
Gain offset and bipolar zero errors can be adjusted to zero using
the circuit shown in Figure 4b as follows:
STEP I . . . OFFSET ADJUST
Turn OFF all bits. Adjust trimmer R2 to give –10.000000 volts
output.
STEP II . . . GAIN ADJUST
Turn all bits ON and adjust R1 to give a reading of +9.999694
volts.
100
Figure 3b. 0 V to +10 V Unipolar Voltage Output with
Gain and Offset Adjustment
R1
LDAC
LDAC
50
R1
CS
CS
L1
L1
23
27
23
27
28
28
6
5
6
5
Figure 4a.
10k
10k
10V REF
10V REF
–V
–V
(MSB)
(MSB)
DB15
DB15
1
EE
1
7
EE
7
16-BIT LATCH
16-BIT LATCH
16-BIT LATCH
16-BIT LATCH
16-BIT DAC
16-BIT DAC
+V
10 V Bipolar Voltage Output
+V
2
CC
50
2
R2
CC
AD669
AD669
+V
+V
(LSB)
3
DB0
(LSB)
LL
3
DB0
22
LL
22
4
10.05k
4
10k
AMP
10.05k
10k
AMP
24
26
25
24
26
25
R2
50
16k
R3
GND
OUTPUT
OUTPUT
GND
+15V
–15V
R4
10k
–6–
STEP III . . . BIPOLAR ZERO ADJUST
(Optional) In applications where an accurate zero output is re-
quired, set the MSB ON, all other bits OFF, and readjust R2
for zero volts output.
It should be noted that using external resistors will introduce a
small temperature drift component beyond that inherent in the
AD669. The internal resistors are trimmed to ratio-match and
temperature-track other resistors on chip, even though their ab-
solute tolerances are 20% and absolute temperature coeffi-
cients are approximately –50 ppm/ C. In the case that external
resistors are used, the temperature coefficient mismatch be-
tween internal and external resistors, multiplied by the sensitiv-
ity of the circuit to variations in the external resistor value, will
be the resultant additional temperature drift.
INTERNAL/EXTERNAL REFERENCE USE
The AD669 has an internal low noise buried Zener diode refer-
ence which is trimmed for absolute accuracy and temperature
coefficient. This reference is buffered and optimized for use in a
high speed DAC and will give long-term stability equal or supe-
rior to the best discrete Zener diode references. The perfor-
mance of the AD669 is specified with the internal reference
driving the DAC since all trimming and testing (especially for
gain and bipolar offset) is done in this configuration.
The internal reference has sufficient buffering to drive external
circuitry in addition to the reference currents required for the
DAC (typically 1 mA to REF IN and 1 mA to BIPOLAR OFF-
SET). A minimum of 2 mA is available for driving external
loads. The AD669 reference output should be buffered with an
external op amp if it is required to supply more than 4 mA total
current. The reference is tested and guaranteed to 0.2% max
error. The temperature coefficient is comparable to that of the
gain TC for a particular grade.
If an external reference is used (10.000 V, for example), addi-
tional trim range should be provided, since the internal refer-
ence has a tolerance of 20 mV, and the AD669 gain and
bipolar offset are both trimmed with the internal reference. The
optional gain and offset trim resistors in Figures 5 and 6 provide
enough adjustment range to null these errors.
It is also possible to use external references other than 10 volts
with slightly degraded linearity specifications. The recom-
mended range of reference voltages is +5 V to +10.24 V, which
Figure 4b.
Offset Adjustment
100
LDAC
R1
CS
L1
23
27
28
6
5
10k
10 V Bipolar Voltage Output with Gain and
10V REF
–V
(MSB)
DB15
1
EE
7
16-BIT LATCH
16-BIT LATCH
16-BIT DAC
+V
100
R2
2
CC
AD669
+V
(LSB)
3
DB0
LL
22
4
10.05k
10k
AMP
24
26
25
OUTPUT
GND
REV. A

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