PIC12F1822-I/SN Microchip Technology, PIC12F1822-I/SN Datasheet - Page 118

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PIC12F1822-I/SN

Manufacturer Part Number
PIC12F1822-I/SN
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 S
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets

Specifications of PIC12F1822-I/SN

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
No. Of I/o's
6
Eeprom Memory Size
256Byte
Ram Memory Size
128Byte
Embedded Interface Type
AUSART, EUSART, I2C, SPI
No. Of Pins
8
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Processor Series
PIC12F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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PIC12F/LF1822/PIC16F/LF1823
REGISTER 11-6:
TABLE 11-3:
DS41413B-page 118
EECON1
EECON2
EEADRL
EEADRH
EEDATL
EEDATH
INTCON
PIE2
PIR2
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Data EEPROM module.
Note 1:
bit 7
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
bit 7-0
Name
W-0/0
*
Page provides register information.
PIC16F/LF1823 only.
EEPGD
OSFIE
OSFIF
Bit 7
GIE
Data EEPROM Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
EECON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes. Refer to
Memory”
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
W-0/0
EECON2: EEPROM CONTROL 2 REGISTER
C2IE
C2IF
CFGS
PEIE
Bit 6
for more information.
(1)
(1)
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
EEPROM Control Register 2 (not a physical register)
W-0/0
TMR0IE
LWLO
Bit 5
C1IE
C1IF
EEPROM Control Register 2
W-0/0
FREE
Bit 4
INTE
EEIE
EEIF
Preliminary
EEADRL<7:0>
EEDATL<7:0>
EEADRH<6:0>
WRERR
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
BCL1IE
BCL1IF
IOCIE
Bit 3
EEDATH<5:0>
W-0/0
Section 11.2.2 “Writing to the Data EEPROM
TMR0IF
WREN
Bit 2
W-0/0
Bit 1
INTF
WR
 2010 Microchip Technology Inc.
W-0/0
IOCIF
Bit 0
RD
Register
on Page
W-0/0
118*
117
116
116
116
116
91
93
95
bit 0

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