ADSP-2185KSTZ-133 Analog Devices Inc, ADSP-2185KSTZ-133 Datasheet - Page 2

• Manufacturer Part Number: ADSP-2185KSTZ-133
• Description: MICROCOMPUTER, 16BIT 33MIPS, SMD
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr

Specifications of ADSP-2185KSTZ-133

• No. Of Bits: 16
• Frequency: 33.3MHz
• Supply Voltage: 5V
• Embedded Interface Type: Host Port, Serial
• No. Of Mips: 33
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-2185
Fabricated in a high speed, double metal, low power, 0.5 m
CMOS process, the ADSP-2185 operates with a 30 ns instruc-
tion cycle time. Every instruction can execute in a single proces-
sor cycle.
The ADSP-2185’s flexible architecture and comprehensive
instruction set allow the processor to perform multiple opera-
tions in parallel. In one processor cycle the ADSP-2185 can:
• generate the next program address
• fetch the next instruction
• perform one or two data moves
• update one or two data address pointers
• perform a computational operation
This takes place while the processor continues to:
• receive and transmit data through the two serial ports
• receive and/or transmit data through the internal DMA port
• receive and/or transmit data through the byte DMA port
• decrement timer
Development System
The ADSP-2100 Family Development Software, a complete set
of tools for software and hardware system development, sup-
ports the ADSP-2185. The System Builder provides a high level
method for defining the architecture of systems under develop-
ment. The Assembler has an algebraic syntax that is easy to
program and debug. The Linker combines object files into an
executable file. The Simulator provides an interactive instruction-
level simulation with a reconfigurable user interface to display
different portions of the hardware environment. A PROM
Splitter generates PROM programmer compatible files. The
C Compiler, based on the Free Software Foundation’s GNU
C Compiler, generates ADSP-2185 assembly source code. The
source code debugger allows programs to be corrected in the
C environment. The Runtime Library includes over 100 ANSI-
standard mathematical and DSP-specific functions.
The EZ-KIT Lite is a hardware/software kit offering a complete
development environment for the entire ADSP-21xx family: an
ADSP-218x based evaluation board with PC monitor software
plus Assembler, Linker, Simulator and PROM Splitter software.
The ADSP-21xx EZ-KIT Lite is a low cost, easy to use hard-
ware platform on which you can quickly get started with your
DSP software design. The EZ-KIT Lite includes the following
features:
• 33 MHz ADSP-2181
• Full 16-bit Stereo Audio I/O with AD1847 SoundPort
• RS-232 Interface to PC with Windows
• Stand-Alone Operation with Socketed EPROM
• EZ-ICE
• DSP Demo Programs
The ADSP-218x EZ-ICE
debugging of an ADSP-2185 system. The emulator consists of
hardware, host computer resident software, and the target board
connector. The ADSP-2185 integrates on-chip emulation sup-
port with a 14-pin ICE-PORT™* interface. This interface pro-
vides a simpler target board connection that requires fewer
mechanical clearance considerations than other ADSP-2100
Family EZ-ICE
from the target system when using the EZ-ICE
adapters needed. Due to the small footprint of the EZ-ICE
connector, emulation can be supported in final board designs.
*All trademarks are the property of their respective holders.
*EZ-ICE and SoundPORT are registered trademarks of Analog Devices, Inc.
®*
Connector for Emulator Control
®
*s. The ADSP-2185 device need not be removed
®
* Emulator aids in the hardware
®
3.1 Control Software
®
*, nor are any
®
* Codec
®
*
–2–
The EZ-ICE
• In-target operation
• Up to 20 breakpoints
• Single-step or full-speed operation
• Registers and memory values can be examined and altered
• PC upload and download functions
• Instruction-level emulation of program booting and execution
• Complete assembly and disassembly of instructions
• C source-level debugging
See Designing An EZ-ICE
ADSP-2100 Family EZ-Tools Manual (ADSP-2181 sections) as
well as the Target Board Connector for EZ-ICE
tion of this data sheet for the exact specifications of the EZ-ICE
target board connector.
Additional Information
This data sheet provides a general overview of ADSP-2185
functionality. For additional information on the architecture and
instruction set of the processor, refer to the ADSP-2100 Family
User’s Manual. For more information about the development
tools, refer to the ADSP-2100 Family Development Tools Data
Sheet.
ARCHITECTURE OVERVIEW
The ADSP-2185 instruction set provides flexible data moves
and multifunction (one or two data moves with a computation)
instructions. Every instruction can be executed in a single pro-
cessor cycle. The ADSP-2185 assembly language uses an alge-
braic syntax for ease of coding and readability. A comprehensive
set of development tools supports program development.
Figure 1 is an overall block diagram of the ADSP-2185. The
processor contains three independent computational units: the
ALU, the multiplier/accumulator (MAC) and the shifter. The
computational units process 16-bit data directly and have provi-
sions to support multiprecision computations. The ALU per-
forms a standard set of arithmetic and logic operations; division
primitives are also supported. The MAC performs single-cycle
multiply, multiply/add and multiply/subtract operations with 40
bits of accumulation. The shifter performs logical and arith-
metic shifts, normalization, denormalization and derive expo-
nent operations.
The shifter can be used to efficiently implement numeric
format control including multiword and block floating-point
representations.
DATA ADDRESS
GENERATORS
DAG 1
ALU
ARITHMETIC UNITS
ADSP-2100 BASE
ARCHITECTURE
DAG 2
MAC
®
SHIFTER
SEQUENCER
* performs a full range of functions, including:
PROGRAM
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
PROGRAM MEMORY ADDRESS
Figure 1. Block Diagram
PROGRAM
MEMORY
16k
SPORT 0
SERIAL PORTS
®
POWER-DOWN
*-Compatible Target System in the
24
MEMORY
CONTROL
SPORT 1
MEMORY
16k
DATA
16
PROGRAMMABLE
TIMER
FLAGS
AND
I/O
®
* Probe sec-
FULL MEMORY
CONTROLLER
EXTERNAL
EXTERNAL
EXTERNAL
INTERNAL
HOST MODE
ADDRESS
BYTE DMA
DATA
DATA
PORT
BUS
DMA
BUS
BUS
MODE
OR
REV. 0
®
*