CS5460A-BS Cirrus Logic Inc, CS5460A-BS Datasheet - Page 16

• Manufacturer Part Number: CS5460A-BS
• Description: Driver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5460A-BS

• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5V
• Driver Case Style: SSOP
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

result from one of several result registers. The first
8 SCLKs are used to clock in the command to de-
termine which register is to be read. The last 24
SCLKs are used to read the desired register. After
reading the data, the serial port remains in the ac-
tive state, and waits for a new command to be is-
sued. (See Section 3 for more details on reading
register data from the CS5460A).
2.2.3 Continuous Computation Cycles
(C=1)
When C = 1, the CS5460A will perform conversions
in ‘continuous computation cycles’ data acquisition
mode. Based on the information provided in the Cy-
cle Count Register, computation cycles are repeat-
edly performed on the voltage and current channels
(after every N conversions). Computation cycles
cannot be started/stopped on a ‘per-channel’ basis.
After each computation cycle is completed, DRDY
is set. Thirty-two SCLKs are then needed to read a
register. The first 8 SCLKs are used to clock in the
command to determine which results register is to
be read. The last 24 SCLKs are used to read out the
24-bit calculation result. While in this acquisition
mode, the designer/programmer may choose to ac-
quire (read) only those calculations required for
their particular application, as DRDY repeatedly in-
dicates the availability of new data. Note again that
the MCU firmware must reset the DRDY bit to “0”
before it can be asserted again.
Referring again to Figure 3, note that within the
Irms and Vrms data paths, prior to the square-root
operation, the instantaneous voltage/current data
is low-pass filtered by a Sinc
is decimated to every Nth sample. Because of the
Sinc
nel will be invalid (i.e. all RMS calculations are in-
valid in the ‘single computation cycle’ data
acquisition mode and the first RMS calculation re-
sults will be invalid in the ‘continuous computation
cycles’ data acquisition mode). However, all ener-
gy calculations will be valid since energy calcula-
tions do not require this Sinc
If the ’Start Conversions’ command is issued to the
CS5460A (see Section 4.1, Commands (Write
Only)), and if the ‘C’ bit in this command is set to a
value of ‘1’, the device will remain in its active state.
Once commanded into continuous computation
16
2
filter operation, the first output for each chan-
2
2
operation.
filter. Then the data
cycles data acquisition mode, the CS5460A will
continue to perform A/D conversions on the volt-
age/current channels, as well as all subsequent
calculations, until:
1) the ‘Power-Up/Halt’ command is received
2) loss of power, or
3) the RS bit in the Configuration Register is as-
4) the /RESET pin is asserted and then de-assert-
2.3 Basic Application Circuit
Configurations
Figure 6 shows the CS5460A connected to a ser-
vice to measure power in a single-phase 2-wire
system operating from a single power supply. Note
that in this diagram the shunt resistor used to mon-
itor the line current is connected on the “Line” (hot)
side of the power mains. In most residential power
metering applications, the power meter’s cur-
rent-sense shunt resistor is intentionally placed on
the ‘hot’ side of the power mains in order to help
detect any attempt by the subscriber to steal pow-
er. In this type of shunt-resistor configuration, note
that the common-mode level of the CS5460A must
be referenced to the hot side of the power line. This
means that the common-mode potential of the
CS5460A will typically oscillate to very high posi-
tive voltage levels, as well as very high negative
voltage levels, with respect to earth ground poten-
tial. The designer must therefore be careful when
attempting to interface the CS5460A’s digital out-
put lines to an external digital interface (such as a
LAN connection or other communication network).
Such digital communication networks may require
that the CMOS-level digital interface to the meter is
referenced to an earth-ground. In such cases, the
CS5460A’s digital serial interface pins must be iso-
lated from the external digital interface, so that
there is no conflict between the ground references
of the meter and the external interface. The
CS5460A and associate circuitry should be en-
closed in a protective insulated case when used in
this configuration, to avoid risk of harmful electric
shock to humans/animals/etc.
Figure 7 shows how the same single-phase
two-wire system can be metered while achieving
through the serial interface, or
serted (‘software reset’), or
ed (‘hardware reset’).
CS5460A
DS487F4