DSPIC30F6010AT-30I/PF Microchip Technology, DSPIC30F6010AT-30I/PF Datasheet

no-image

DSPIC30F6010AT-30I/PF

Manufacturer Part Number
DSPIC30F6010AT-30I/PF
Description
IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6010AT-30I/PF

Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6010AT-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
The dsPIC30F6010A/6015 (Rev. A4) samples that you
have received were found to conform to the
specifications and functionality described in the
following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70150 – “dsPIC30F6010A/6015 Data Sheet”
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the specific devices listed
below:
• dsPIC30F6010A
• dsPIC30F6015
These devices may be identified by the following
message that appears in the MPLAB
Window under MPLAB IDE, when a “Reset and
Connect” operation is performed within MPLAB IDE:
Setting Vdd source to target
Target Device dsPIC30F6010A found,
revision = Rev A4
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in
dsPIC30F6015 devices.
© 2008 Microchip Technology Inc.
Reference Manual”
future
revisions
dsPIC30F6010A/6015 Rev. A4 Silicon Errata
of
dsPIC30F6010A
®
ICD 2 Output
dsPIC30F6010A/6015
and
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Timer Module
DISI Instruction
The DISI instruction will not disable interrupts if
DISI instruction is executed in the same
instruction
decrements to zero.
Output Compare Module
The output compare module will produce a glitch
on the output when an I/O pin is initially set high
and the module is configured to drive the pin low at
a specified time.
Output Compare Module in PWM Mode
Output compare will produce a glitch when
loading 0% duty cycle in PWM mode. It will also
miss the next compare after the glitch.
Quadrature Encoder Interface Module
The Index Pulse Reset mode of the QEI does not
work properly when used along with count error
detection. When counting upwards, the POSCNT
register will increment one extra count after the
index pulse is received. The extra count will
generate a false count error interrupt.
INT0, ADC and Sleep Mode
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero.
10-bit ADC: Sampling Rate
The 10-bit Analog-to-Digital Converter (ADC) has
a maximum sampling rate of 750 ksps.
Quadrature Encoder Interface (QEI) Module
The QEI module does not generate an interrupt in
a particular overflow condition.
Motor Control PWM – PWM Counter Register
PTMR does not continue counting down after
halting code execution in Debug mode.
I/O Port – Port Pin Multiplexed with IC1
The port I/O pin multiplexed with the Input Capture
1 (IC1) function cannot be used as a digital input
pin when the UART auto-baud feature is enabled.
Clock switching prevents the device from waking
up from Sleep.
cycle
that
the
DS80400A-page 1
DISI
counter

Related parts for DSPIC30F6010AT-30I/PF

DSPIC30F6010AT-30I/PF Summary of contents

Page 1

... MPLAB ICD 2 Ready The errata described in this section will be addressed in future revisions of dsPIC30F6010A dsPIC30F6015 devices. © 2008 Microchip Technology Inc. dsPIC30F6010A/6015 Silicon Errata Summary The following list summarizes the errata described in this document: 1. DISI Instruction The DISI instruction will not disable interrupts if ...

Page 2

... SDA and SCL pins, causing a false communication start in a single-master configuration or a bus collision in a multi-master configuration. The following sections describe the errata and work around to these errata, where they may apply. © 2008 Microchip Technology Inc. ® DSC ...

Page 3

... DISI instruction. Alternatively, make sure that subsequent DISI instructions are called before the DISI counter decrements to zero. © 2008 Microchip Technology Inc. dsPIC30F6010A/6015 2. Module: Output Compare A glitch will be produced on an output compare pin under the following conditions: • ...

Page 4

... INT0 triggered conversion (SMPI<3:0> = 0000). Work around None. If ADC event trigger from the INT0 pin is required, initialize SMPI<3:0> to ‘0000’ (interrupt on every conversion). POSRES bit © 2008 Microchip Technology Inc. ...

Page 5

... T AD 750 ksps Up to 153. 500 ksps Up to 256. 300 ksps Work around None. © 2008 Microchip Technology Inc. dsPIC30F6010A/6015 R Max V Temperature S DD 500Ω 4.5V to 5.5V -40°C to +85°C 5.0 kΩ 4.5V to 5.5V -40°C to +125°C 5.0 kΩ 3.0V to 5.5V -40°C to +125°C ...

Page 6

... POSCNT, the variable will toggle bit 15. Example 1 shows the code required for this global variable. // Instead of 0xFFFF // Clear QEI interrupt flag // x=2 for dsPIC30F // x=3 for dsPIC33F © 2008 Microchip Technology Inc. ...

Page 7

... Work around Do not clock switch to any other oscillator mode if the timer is being used in Asynchronous mode using the secondary oscillator (32.768 kHz). © 2008 Microchip Technology Inc. dsPIC30F6010A/6015 11. Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page ...

Page 8

... If the D_A flag and the I2COV flag are both set, a valid data byte was received and a previous valid data byte was lost. It will be necessary to code for handling this overflow condition. © 2008 Microchip Technology Inc slave interrupt 2 C nodes. ...

Page 9

... Work around None. © 2008 Microchip Technology Inc. dsPIC30F6010A/6015 17. Module: I When the I I2CEN bit in the I2CCON register, the dsPIC DSC device generates a glitch on the SDA and SCL pins. This glitch falsely indicates “Communication Start” ...

Page 10

... APPENDIX A: REVISION HISTORY Revision A (9/2008) Initial version of the document. DS80400A-page 10 © 2008 Microchip Technology Inc. ...

Page 11

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 12

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

Related keywords