EP7309-CR Cirrus Logic Inc, EP7309-CR Datasheet - Page 10

32-Bit Microcontroller IC

EP7309-CR

Manufacturer Part Number
EP7309-CR
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of EP7309-CR

Controller Family/series
(ARM7)
Core Size
32 Bit
No. Of Timers 8/12/16/32 Bits
0 / 0 / 2 / 0
Interface
SSI, UART
Embedded Interface Type
SSI, UART
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP7309-CR
Manufacturer:
AGERE
Quantity:
3 120
Part Number:
EP7309-CR
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
EP7309
High-Performance, Low-Power System on Chip
10
COUT
CI/O
IDD
IDD
IDD
V
Symbol
DDstandby
standby
idle
operatin
a.
b.
c.
Note:
Output capacitance
Transceiver capacitance
Standby current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Idle current consumption
Core, Osc, RTC @2.5 V
I/O @ 2.5 V
Operating current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Standby supply voltage
1) All power dissipation values can be derived from taking the particular IDD current and multiplying by 2.5 V.
2) The RTC of the EP7309 should be brought up at room temperature. This is required because the RTC OSC will NOT function
3) A typical design will provide 3.3 V to the I/O supply (i.e., V
4) Pull-up current = 50 µA typical at V
See
Assumes buffer has no pull-up or pull-down resistors.
The leakage value given assumes that the pin is configured as an input pin but is not currently being driven.
properly if it is brought up at –40 ° C. Once operational, it will continue to operate down to –20 ° C extended and 0 ° C
commercial.
compatible with 3.3 V powered external logic.
Table S on page
Parameter
23.
Copyright 2001 Cirrus Logic (All Rights Reserved)
DD
Min
TBD
8
8
= 3.3 V.
Typ
TBD
TBD
TBD
TBD
TBD
TBD
DD
IO), and 2.5 V to the remaining logic. This is to allow the I/O to be
Max
10.0
10.0
300
4.2
Unit
mA
mA
pF
pF
µA
V
Only 32 kHz oscillator running,
Cache disabled, all other I/O
static, VIH = V
VIL = GND ± 0.1 V
Both oscillators running, CPU
static, Cache disabled, LCD
refresh active, VIH = V
VIL = GND ± 0.1 V
At 13 MHz
All system active, running typical
program, cache disabled, and
LCD inactive
Minimum standby voltage for
state retention and RTC
operation only
Conditions
DD
± 0.1 V,
DD
DS507PP1
± 0.1 V,

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