PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC

PIC16F628AT-E/SS

Manufacturer Part Number
PIC16F628AT-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16F628AT-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
This document includes the
programming specifications for the
following devices:
• PIC16F627A
• PIC16F628A
• PIC16F648A
• PIC16LF627A
• PIC16LF628A
• PIC16LF648A
FIGURE 1-1:
© 2007 Microchip Technology Inc.
Note:
PDIP, SOIC
RA4/T0CKI/CMP2
RA3/AN3/CMP1
RA5/MCLR/V
RA2/AN2/V
RB1/RX/DT
RB2/TX/CK
RB3/CCP1
RB0/INT
All references to PIC16F627A/628A/648A
also apply to PIC16LF62XA devices.
V
REF
PIC16F627A/628A/648A EEPROM Memory
PP
SS
PIN DIAGRAM
• 1
2
3
4
5
7
8
9
6
18
17
16
15
14
12
10
13
11
Programming Specification
RA1/AN1
RA0/AN0
RA7/OSC1/CLKIN
RA6/OSC2/CLKOUT
V
RB7/DATA/T1OSI
RB6/CLOCK/T1OSO/T1CKI
RB5
RB4/PGM
PIC16F627A/628A/648A
DD
Preliminary
RA4/T0CKI/CMP2
RA3/AN3/CMP1
RA5/MCLR/V
SSOP
RA2/AN2/V
1.0
The PIC16F627A/628A/648A is programmed using a
serial method. The Serial mode will allow the
PIC16F627A/628A/648A to be programmed while in
the user’s system. This allows for increased design
flexibility. This programming specification applies to
PIC16F627A/628A/648A devices in all packages.
1.1
The PIC16F627A/628A/648A requires one program-
mable power supply for V
of 12V to 14V, or V
voltage. Both supplies should have a minimum
resolution of 0.25V.
1.2
The Programming mode for the
PIC16F627A/628A/648A allows programming of user
program memory, data memory, special locations used
for ID, and the Configuration Word.
RB1/RX/DT
RB2/TX/CK
RB3/CCP1
RB0/INT
V
V
REF
PP
SS
SS
PROGRAMMING THE
PIC16F627A/628A/648A
Hardware Requirements
Programming Mode
• 1
2
3
4
5
6
7
8
9
10
PP
of 4.5V to 5.5V, when using low
20
19
18
17
16
15
14
13
12
11
DD
(2.0V to 5.5V) and a V
RA1/AN1
RA0/AN0
RA7/OSC1/CLKIN
RA6/OSC2/CLKOUT
V
V
RB7/DATA/T1OSI
RB6/CLOCK/T1OSO/T1CKI
RB5
RB4/PGM
DD
DD
DS41196G-page 1
PP

Related parts for PIC16F628AT-E/SS

PIC16F628AT-E/SS Summary of contents

Page 1

... RB1/RX/ RB2/TX/ RB3/CCP1 © 2007 Microchip Technology Inc. PIC16F627A/628A/648A 1.0 PROGRAMMING THE PIC16F627A/628A/648A The PIC16F627A/628A/648A is programmed using a serial method. The Serial mode will allow the PIC16F627A/628A/648A to be programmed while in the user’s system. This allows for increased design flexibility. This programming specification applies to PIC16F627A/628A/648A devices in all packages ...

Page 2

... MCLR does not draw any significant current. DS41196G-page PIC16F627A/628A 648A During Programming Pin Type I Low-voltage programming input if Configuration bit equals 1 I Clock input I/O Data input/output (1) P Program Mode Select P Power Supply P Ground Preliminary RA7/OSC1/CLKIN RA6/OSC2/CLKOUT RB7/DATA/T1OSI RB6/CLOCK/T1OSO/T1CKI Pin Description © 2007 Microchip Technology Inc. ...

Page 3

... See Section 3.10 “Check- sum Computation” for calculation details. © 2007 Microchip Technology Inc. PIC16F627A/628A/648A 2.3 EE Data Memory The EE Data memory space extends from 0x00 to 0xFF and is separate from both program memory space and RAM space. ...

Page 4

... User ID Location 2001 User ID Location 2002 User ID Location 2003 User ID Location 2004 Reserved 2005 Reserved 2006 Device ID 2007 Configuration Word DS41196G-page Implemented Implemented 0x3FF 0x7FF 0xFFF 1FFF 2000 Implemented Implemented 2008 Not Implemented 3FFF Preliminary © 2007 Microchip Technology Inc Implemented Implemented ...

Page 5

... Load Data for Data Memory Increment Address Read Data from Program Memory Read Data from Data Memory Begin Programming Only Cycle Bulk Erase Program Memory Bulk Erase Data Memory © 2007 Microchip Technology Inc. PIC16F627A/628A/648A on simple 1 between the Mapping (MSb … LSb ...

Page 6

... LVP mode. DS41196G-page 6 FIGURE 2-3: Thld0 V DD PGM MCLR , then DD DATA CLOCK Note: If the device is in LVP mode, raising V V will override LVP mode. IHH Preliminary ENTERING LOW VOLTAGE PROGRAM/ VERIFY MODE Tlvpp Tppdp to PP © 2007 Microchip Technology Inc. ...

Page 7

... FIGURE 2-5: LOAD DATA COMMAND FOR DATA MEMORY RB6 (CLOCK) RB7 (DATA SET T 1 HLD © 2007 Microchip Technology Inc. PIC16F627A/628A/648A T 2 DLY LSb strt_bit T 2 DLY ...

Page 8

... FIGURE 2-7: BEGIN PROGRAMMING ONLY CYCLE 1 RB6 (CLOCK) RB7 0 (DATA) DS41196G-page DLY First Data Word LSb strt_bit SET T 1 HLD Preliminary stp_bit MSb T – Data Memory DPROG T – Program Memory PROG Next Command © 2007 Microchip Technology Inc. ...

Page 9

... Output mode on the second rising clock edge and revert back to Input mode (high-impedance) after the 16th rising edge. FIGURE 2-9: READ DATA FROM PROGRAM MEMORY RB6 (CLOCK RB7 0 (DATA SET T HLD RB7 = Input © 2007 Microchip Technology Inc. PIC16F627A/628A/648A T 2 DLY DLY T 1 HLD T 2 DLY 1 2 ...

Page 10

... As only 8 bits are transmitted, the last 8 bits are zero padded. FIGURE 2-10: READ DATA FROM DATA MEMORY RB6 (CLOCK RB7 (DATA) Tset1 T 1 HLD RB7 = Input DS41196G-page DLY DLY strt_bit LSb T 1 DLY Preliminary stp_bit MSb RB7 Input RB7 = Output © 2007 Microchip Technology Inc. ...

Page 11

... X Bulk Erase Program Memory X Bulk Erase Program Memory X Bulk Erase Program Memory X © 2007 Microchip Technology Inc. PIC16F627A/628A/648A 3.1 Bulk Erase Program Memory The program memory can be erased with the Bulk Erase Program Memory command. Note: All Bulk Erase operations must take place ...

Page 12

... RB7 1 (DATA) DS41196G-page 12 To perform a Bulk Erase of the data memory, the following sequence must be performed: 1. Execute a Bulk Erase Data memory command. 2. Wait T ERA SET T 1 HLD Preliminary for the erase cycle to complete. ERA Next Command DLY X © 2007 Microchip Technology Inc. ...

Page 13

... Program Memory Data Correct? Increment No All Locations Address Done? Command Verify all Locations Report Verify No Error @ Data Correct? V DDNOM Done © 2007 Microchip Technology Inc. PIC16F627A/628A/648A Start Low Voltage Programming Set Set PGM = V DD Set MCLR = V DD Report No Programming Failure Yes ...

Page 14

... Load Configuration Data No Yes Program ID Program Cycle Location? Report Programming Failure Program Cycle (Config. Word) Report Program No Configuration Data Correct? Word Error Done Preliminary Read Data Command No Data Correct? Yes Set DDNOM Read Data Command Yes © 2007 Microchip Technology Inc. ...

Page 15

... PROGRAM FLOWCHART – PIC16F627A/628A/648A DATA MEMORY Start Program Cycle Read Data from Data Memory Data Correct? Increment No All Locations Address Done? Command Data Correct? Done © 2007 Microchip Technology Inc. PIC16F627A/628A/648A Report No Programming Failure Yes Yes No Report Verify Error Yes Preliminary PROGRAM CYCLE Load Data ...

Page 16

... Locations @ V DS41196G-page 16 Start Low Voltage Programming Set Set PGM = V DD Set MCLR = Start Yes Report No Programming Failure Yes Done? Yes DDNOM Done Preliminary PROGRAM CYCLE Load Data for Program Memory Command Begin Programming Command Wait T PROG © 2007 Microchip Technology Inc. ...

Page 17

... Enabling Brown-out Reset does not automatically enable the Power-up Timer (PWRT). 2: Only a Bulk Erase will reset the Configuration Word, including the CP bits. 3: While MCLR is asserted in INTOSC mode, the internal clock oscillator is disabled. © 2007 Microchip Technology Inc. PIC16F627A/628A/648A TABLE 3-2: Device PIC16F627A ...

Page 18

... Specifically for the PIC16F627A/628A/648A, the EEPROM data memory should also be embedded in the hex file (see Section 3.9 “Embedding Data EEPROM Contents in Hex File”). Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer. DS41196G-page 18 Preliminary ...

Page 19

... For example, ID0 = 0x1, ID1 = 0x2, ID3 = 0x3, ID4 = 0x4, then SUM_ID = 0x1234 *Checksum = [Sum of all the individual expressions] MODULO [0xFFFF Addition & = Bitwise AND © 2007 Microchip Technology Inc. PIC16F627A/628A/648A The checksum is calculated by summing the following: • The contents of all program memory locations • ...

Page 20

... DLY T 2 1.0 — — DLY T 3 — — 80 DLY T — — 4 PROG T — — 6 DPROG T — — 6 ERA Preliminary © 2007 Microchip Technology Inc. Conditions/ Units Comments μs μs μs V Schmitt Trigger input V Schmitt Trigger input ns μ μs μ ...

Page 21

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 22

... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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