PIC18F4420T-I/PT Microchip Technology, PIC18F4420T-I/PT Datasheet

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC

PIC18F4420T-I/PT

Manufacturer Part Number

PIC18F4420T-I/PT

Description

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC

Manufacturer

Microchip Technology

Series

PIC® 18Fr

Datasheets

1.PIC18F2221-ISO.pdf (46 pages)

2.PIC18F2420-IML.pdf (412 pages)

3.PIC18F2420-IML.pdf (16 pages)

4.PIC18F2420-IML.pdf (8 pages)

5.PIC18F2420-IML.pdf (6 pages)

6.PIC18F2420-IML.pdf (8 pages)

7.PIC18F2420-IML.pdf (4 pages)

Specifications of PIC18F4420T-I/PT

Rohs Compliant

YES

Core Processor

PIC

Core Size

8-Bit

Speed

40MHz

Connectivity

I²C, SPI, UART/USART

Peripherals

Brown-out Detect/Reset, HLVD, POR, PWM, WDT

Number Of I /o

Program Memory Size

16KB (8K x 16)

Program Memory Type

FLASH

Eeprom Size

256 x 8

Ram Size

768 x 8

Voltage - Supply (vcc/vdd)

4.2 V ~ 5.5 V

Data Converters

A/D 13x10b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

44-TQFP, 44-VQFP

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

PIC18F4420T-I/PT

Manufacturer:

MICROCHIP

Quantity:

4 000

Company:

BOSTOCK HK LIMITED

Part Number:

PIC18F4420T-I/PT

Manufacturer:

Microchip Technology

Quantity:

10 000

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The PIC18F2420/2520/4420/4520 Rev. B2 parts you

have received conform functionally to the Device Data

Sheet

described below. Any Data Sheet Clarification issues

related to the PIC18F2420/2520/4420/4520 will be

reported in a separate Data Sheet errata. Please check

the Microchip web site for any existing issues.

The

PIC18F2420/2520/4420/4520 devices with these

Device/Revision IDs:

TABLE 1:

Param

The Device IDs (DEVID1 and DEVID2) are located at

addresses

configuration space. They are shown in binary in the

format “DEVID2 DEVID1”.

No.

Part Number

PIC18F2420

PIC18F2520

PIC18F4420

PIC18F4520

following

(DS39631C),

PIC18F2420/2520/4420/4520 Rev. B2 Silicon Errata

Symbol

3FFFFEh:3FFFFFh

EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING)

silicon

0001 0001 010

0001 0001 000

0001 0000 110

0001 0000 100

SS ↓ to SCK ↓ or SCK ↑ Input

Device ID

except

errata apply

for

the

PIC18F2420/2520/4420/4520

Revision ID

the

Characteristic

0 0101

anomalies

only

device’s

1. Module: MSSP

In SPI Slave mode with slave select enabled

(SSPM<3:0> = 0100), the minimum time between

the falling edge of the SS pin and first SCK edge

is greater than specified in parameter 70 in

Table 26-16 and Table 26-17. The updated

specification is shown in bold in Table 1.

The minimum time between the SS pin low and an

SSPBUF write is also 3 T

the SS pin occurs greater than 3 T

first SCK edge, or loading SSPBUF, the peripheral

will function correctly. Also, if SSPBUF is written

prior to the SS pin going low, the peripheral will

function correctly.

Work around

None.

Date Codes that pertain to this issue:

All engineering and production devices.

3 T

Min

Max Units Conditions

—

. If the falling edge of

DS80288G-page 1

before the

Related parts for PIC18F4420T-I/PT

PIC18F4420T-I/PT Summary of contents

Page 1

... © 2007 Microchip Technology Inc. PIC18F2420/2520/4420/4520 1. Module: MSSP In SPI Slave mode with slave select enabled the anomalies (SSPM<3:0> = 0100), the minimum time between the falling edge of the SS pin and first SCK edge is greater than specified in parameter 70 in Table 26-16 and Table 26-17. The updated specification is shown in bold in Table 1 ...

Page 2

... In this configuration, the SBOREN bit resets to ‘1’, enabling the BOR. - When code execution begins following all Resets, disable the BOR by clearing the SBOREN bit (RCON<6>). Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. ...

Page 3

... EUSART will continue to sample the RX pin with the interrupt generated on the falling edge; bit cleared in hardware on following rising edge pin is not monitored or rising edge detected Synchronous mode: Unused in this mode. © 2007 Microchip Technology Inc. PIC18F2420/2520/4420/4520 Register 18-3, on page 204, will be changed as shown. Work around None required ...

Page 4

... All engineering and production devices. SCK PULSE VARIATION USING TIMER2/2 bit bit bit AVOIDING THE INITIAL SHORT SCK PULSE ;Data received? ;(Xmit complete?) ; SSPBUF ;Save in user RAM ;W = TXDATA ;Timer2 off ;Clear Timer2 ;Xmit New data ;Timer2 on © 2007 Microchip Technology Inc. ...

Page 5

... Rev E Document (4/2007) Added silicon issue 6 (Enhanced Synchronous Receiver Transmitter – EUSART). Rev F Document (6/2007) Added silicon issue 7 (10-Bit Analog-to-Digital Converter) and 8 (MSSP – SPI Mode). Rev G Document (8/2007) Modified silicon issue 6 (EUSART). © 2007 Microchip Technology Inc. PIC18F2420/2520/4420/4520 Universal DS80288G-page 5 ...

Page 6

Page 7

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 8

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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