MM-PENTRA-16 IDEC, MM-PENTRA-16 Datasheet - Page 37

PLC Starter Kit

MM-PENTRA-16

Manufacturer Part Number
MM-PENTRA-16
Description
PLC Starter Kit
Manufacturer
IDEC
Datasheet

Specifications of MM-PENTRA-16

Kit Contents
16 I/O Slim CPU, 30W Power Supply, WindLDR Software, PC Cable
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Programmable Logic Controllers
Analog Output Specifi cations
Effect of Improper Input Connection
Maximum Permanent Allowed Overload
(No Damage)
Selection of Analog Input Signal
Calibration or Verifi cation to
Maintain Rated Accuracy
Part Number
Output Voltage
Output Range
Load Impedance
Load
Settling Time
Total Output Transfer Time
Output
Error
Digital Resolution
Output Value of LSB
Data Type in Application Program
Monotonicity
Current Loop Open
Noise
Resistance
Isolation
Effect of Improper Output Connection
Selection of Analog Output Signal
Calibration or Verifi cation to Maintain Rated
Accuracy
1: The 16-bit data (0 to 50000) processed in the analog I/O module can be linear-converted to a value between –32768 and 32767. The optional range designation, and analog I/O data minimum and
2: When an error is detected, a corresponding error code is stored to a data register allocated to analog I/O operating status.
1. The 12-bit data (0 to 4095) processed in the analog I/O module can be linear-converted to a value between –32768 and 32767. The optional range
maximum values can be selected using data registers allocated to analog I/O modules.
designation, and analog I/O data minimum and maximum values can be selected using data registers allocated to analog I/O modules.
Maximum Error at 25× C
Temperature Coeffi cient
Repeatability after Stabilization Time
Output Voltage Drop
Non-linearity
Output Ripple
Overshoot
Total Error
Maximum Temporary Deviation during Electri-
cal Noise Tests
Cable
Crosstalk
Between output and power circuit
Between output and internal circuit
Voltage
Current
11V DC
USA: 800-262-IDEC
22mA DC
FC4A-L03A1
50ms
50ms + 1 scan time
±3% maximum when a 500V clamp voltage is applied to the power and I/O wiring
Twisted pair shielded cable is recommended for improved noise immunity
Default: 0 to 4095 (standard)
Optional: –32768 to 32767 (optional range designation)
Canada: 888-317-IDEC
FC4A-L03AP1
130ms
130ms + 1 scan time
4096 increments (12 bits)
±0.015% of full scale/ºC
Using software programming
0 to 10V DC
2.5mV
None
500V
4μA
Current Output: 300kΩ maximum
Voltage Output: 2kΩ minimum
Using software programming
No damage
Photocoupler-isolated
±0.2% of full scale
±0.5% of full scale
±0.2% of full scale
N/A
±1% of full scale
±1% of full scale
1 LSB maximum
Resistive load
Undetectable
No damage
4 to 20mA
N/A
0%
Yes
FC4A-K1A1
50ms
50ms + 1 scan time
MicroSmart Series
1
FC4A-K2C1
–10 to +10V DC
1ms/ch
1ms × channels+ 1 scan
time
±0.005% of full scale/ºC
50000 increments (16 bits)
0.4mV
0.32μA
–25000 to 25000 (voltage)
0 to 50000 (current)
Not assured
Twisted pair cable
2 LSB maximum
Isolated
37

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