UMP-15/2.65-D48-C Murata Power Solutions Inc, UMP-15/2.65-D48-C Datasheet - Page 8

DC/DC TH 40W 48-15V XMP

UMP-15/2.65-D48-C

Manufacturer Part Number
UMP-15/2.65-D48-C
Description
DC/DC TH 40W 48-15V XMP
Manufacturer
Murata Power Solutions Inc
Series
UMPr
Datasheet

Specifications of UMP-15/2.65-D48-C

Product
Isolated
Output Power
40 W
Input Voltage Range
36 V to 75 V
Number Of Outputs
1
Output Voltage (channel 1)
15 V
Output Current (channel 1)
2.65 A
Isolation Voltage
1.5 KV
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Quality and Reliability
These models are the latest DC/DC Converters to emerge from DATEL’s new,
company-wide approach to designing and manufacturing the most reliable
power converters available. The fi ve-pronged program draws our Quality
Assurance function into all aspects of new-product design, development,
characterization, qualifi cation and manufacturing.
Design for Reliability
Design for Reliability is woven throughout our multi-phased, new-product-de-
velopment process. Design-for-reliability practices are fully documented and
begin early in the new-product development cycle with the following goals:
1. To work from an approved components/vendors list ensuring the use of
reliable components and the rigorous qualifi cation of new components.
2. To design with safety margins by adhering to a strict set of derating
guidelines and performing theoretical worst-case analyses.
3. To locate potential design weaknesses early in the product-development
cycle by using extensive HALT (Highly Accelerated Life Testing).
4. To prove that early design improvements are effective by employing a
thorough FRACA (Failure Reporting Analysis and Corrective Action) system.
HALT Testing
The goal of the accelerated-stress techniques used by DATEL is to force
device maturity, in a short period of time, by exposing devices to excessive
levels of "every stimulus of potential value." We use HALT (Highly Acceler-
ated Life Testing) repeatedly during the design and early manufacturing
phases to detect potential electrical and mechanical design weaknesses
that could result in possible future fi eld failures.
www.murata-ps.com
to progressively higher stress levels induced by thermal cycling, rate of tem-
perature change, vibration, power cycling, product-specifi c stresses (such as
dc voltage variation) and combined environments. The stresses are not meant
to simulate fi eld environments but to expose any weaknesses in a product’s
electro/mechanical design and/or assembly processes. The goal of HALT is to
make products fail so that device weaknesses can be analyzed and strength-
ened as appropriate. Applied stresses are continually stepped up until products
eventually fail. After corrective actions and/or design changes, stresses are
stepped up again and the cycle is repeated until the "fundamental limit of the
technology" is determined.
voltage and temperature extremes as well as 6-axis, linear and rotational,
random vibration. A typical HALT profi le (shown above) consists of thermal
cycling (–55 to +125°C, 30°C/minute) and simultaneous, gradually increasing,
random longitudinal and rotational vibration up to 20G’s with load cycling and
applied-voltage extremes added as desired. Many devices in DATEL’s new
A-Series could not be made to fail prior to reaching either the limits of the HALT
chamber or some previously known physical limit of the device. We also use
the HALT chamber and its ability to rapidly cool devices to verify their "cold-
start" capabilities.
100
–20
–40
80
60
40
20
0
During HALT, prototype and pre-production DC/DC converters are subjected
DATEL has invested in a Qualmark OVS-1 HALT tester capable of applying
10
20
Technical enquiries email: sales@murata-ps.com, tel:
30
25-40W, Single Output, DC/DC Converters
Typical HALT Profi le
Test Time (minutes)
40
50
60
MDC_UMP25-40W_B02 Page 8 of 9
UMP Models
70
80
+1 508 339 3000
90
40
20
0

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