ATJTAGICE2 - JMS2206 Atmel, ATJTAGICE2 - JMS2206 Datasheet

TEST BOARD KIT, COMBO

ATJTAGICE2 - JMS2206

Manufacturer Part Number
ATJTAGICE2 - JMS2206
Description
TEST BOARD KIT, COMBO
Manufacturer
Atmel
Datasheet

Specifications of ATJTAGICE2 - JMS2206

Svhc
No SVHC (15-Dec-2010)
Development Tool Type
Development Kit
Kit Features
Supports Debugging With AVR Traditional JTAG Interface And With DebugWIRE Interface
Mcu Supported Families
AVR Microcontroller
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Kit Contents
Board
Features
Integral 5-volt Linear Regulator, LED DC On Indicator
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Introduction
JTAGICE mkII is Atmel’s on-chip debugging tool for the AVR
The JTAGICE mkII supports debugging with AVR’s traditional JTAG interface and with
the debugWIRE interface. The JTAGICE mkII supports PC communication via RS-232
and USB.
The JTAGICE mkII is supported by AVR Studio version 4.09 and later.
Connecting to target through the debugWIRE interface
The debugWIRE interface uses only one pin, the RESET pin, for communication with
the target. To enable the debugWIRE interface on an AVR Device, the debugWIRE
Enable fuse, DWEN, must be programmed (DWEN=0).
AVR devices with debugWIRE interface are shipped with the DWEN fuse unpro-
grammed. ISP or High-Voltage Programming is required to enable debugWIRE.
Programming the fuse via ISP requires an ISP header on the target board. Using the
6-pin ISP header as shown in Figure 1 is recommended.
The JTAGICE mkII supports ISP as a general programming interface, as well as hav-
ing built in support for handling the DWEN fuse and performing the Chip Erase when
debugging. ISP is also supported by Atmel’s STK500 and AVRISP mkII. See the rele-
vant user guides for more information. All user guides are found in the AVR Studio On-
line help.
The recommended connection when the JTAGICE mkII is used for both debugWIRE
and limited ISP, is the ISP6PIN header. See Figure 1, Figure 2 on page 2 and Table 1
on page 2.
Note:
Figure 1. ISP6PIN header pinout
When the DWEN fuse is set, the ISP interface is disabled. This is because the debug-
WIRE must have full control over the RESET pin.
Connecting to a target board with the
AVR JTAGICE mkII
RESET
MISO
SCK
ISP6PIN
1 2
VCC
MOSI
GND
®
microcontroller family.
8-bit
Microcontrollers
JTAGICE mkII
Quick Start
Guide
2562C–AVR–07/06

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ATJTAGICE2 - JMS2206 Summary of contents

Page 1

... DWEN fuse and performing the Chip Erase when debugging. ISP is also supported by Atmel’s STK500 and AVRISP mkII. See the rele- vant user guides for more information. All user guides are found in the AVR Studio On- line help ...

Page 2

Enabling debugWIRE interface with JTAGICE mkII AVR JTAGICE mkII 2 The connection between the JTAGICE mkII probe and the 6-pin header on the target is described in Table 1. Table 1. Connections required for ISP and debugWIRE JTAGICE mkII probe ...

Page 3

Connecting to the target through the ISP Interface Re-enabling the ISP interface Connecting to the target through the JTAG interface 2562C–AVR–07/06 Connecting to the ISP interface is described in the section documenting the debugWIRE connection. When the DWEN fuse is ...

Page 4

... Volts. Alternatively, the JTAGICE mkII can be connected to the PC with a USB cable, making an external power supply superfluous. See the JTAGICE mkII “Related devices” list on www.atmel.com/avr, or use the AVR Studio On-line Help for the most updated device list. Description ...

Page 5

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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