LS-AH-LDEL Lattice, LS-AH-LDEL Datasheet - Page 2

• Manufacturer Part Number: LS-AH-LDEL
• Description: Development Software Active-HDL Lattice D esigner Edition Lite
• Manufacturer: Lattice

Specifications of LS-AH-LDEL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ispLEVER
The Simple Machine for Complex Design
Lattice’ s ispLEVER software features a comprehensive set
of powerful tools, including everything you need to take
your FPGA or CPLD design from concept to a programmed
device. The ispLEVER software family supports all Lattice
programmable products with a push-button design environ-
ment and advanced features for design optimization and
debug.
There are four variations of ispLEVER tailored to meet your
specific design requirements. A handy reference chart detail-
ing the features of each ispLEVER variation is provided at
the end of this brochure.
ispLEVER
ispLEVER is the flagship design environment for
the newest Lattice FPGA products. It is provided on
CD-ROM and DVD for Windows, UNIX, or Linux
platforms, and can be ordered from your local sales
representative or purchased online.
ispLEVER for Windows also includes industry leading
3rd party synthesis and simulation tools from Lattice
partners Synplicity
ispLEVER for Windows and Linux includes a USB
download cable for programming Lattice silicon de-
vices.
ispLEVER PRO
ispLEVER PRO includes all the features and functional-
ity of the ispLEVER software, and adds the Lattice IP
Value suite, which includes DDR, DDR2, FIR Filter,
FFT and Tri-Speed MAC IP cores. These IP cores can be
used repeatedly on multiple FPGA platforms during the
license period. ispLEVER PRO is available via a 1-year
subscription license on the Windows platform.
ispLEVER Starter
ispLEVER Starter is a downloadable version of is-
pLEVER for Windows. It is a complete design environ-
ment for selected Lattice digital devices.
ispLEVER Classic
ispLEVER Classic is a complete design environment for
Lattice CPLD and mature FPGA products. It is down-
loadable from the Lattice website.
®
and Aldec
®
.
Key Features
Project Navigator
Project Navigator is the ispLEVER project management
interface. The entire set of ispLEVER tools can be accessed
from this interface. Your project files, including the current
target device, are shown in heirarchical format on the left
side of the screen. Tasks associated with those project files
are shown on the right side. Other optional windows dis-
play revision control information, a log file, reports and
IPexpress
HDL
- IP Cores & Modules
- TRACE
- Performance Analyst
Synplicity Synplify Pro
- HDL Explorer
- Text Editor
- Schematic Editor
- Waveform Editor
Aldec Active-HDL
Lattice Edition
Static Timing
LatticeMico32
Debugger
Analysis
System
IP Cores
ispLEVER Project Navigator
LatticeMico32 System
- 32-Bit Open Source uP
ispLEVER Design Flow
Programming
Design Entry
D
D
Map, Place
Simulation
S
Synthesis
Platform
Planning
& Route
Design
Device
Logic
uP
Logic Analysis
MATLAB/
Simulink
Design Planner
Estimation
On-Chip
- Timing Constraints
- SSO Analyzer
- Package/Pin Placement
- Floorplan View
- Path Tracer
Power
ispLeverDSP
- 60+ Simulink Compatible Functions
A
Schematic
Power Calculator
- Power Estimation
- Free-form Utilization
ispVM System
Reveal Logic Analyzer
or Design/VCD Import
- JTAG
- ISP
- SPI
- Embedded uP Support