CY4625 Cypress Semiconductor Corp, CY4625 Datasheet
CY4625
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CY4625 Summary of contents
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... MoBL-USB™ Bridge Firmware Guide CY4625 Document # 001-15686 Version *A Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone (USA): 800.858.1810 Phone (Intnl): 408.943.2600 http://www.cypress.com ...
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... The inclusion of Cypress' product in a life-support systems appli- cation implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. 2 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Enabling OUT Transfers on EP2 and EP6 .....................................................21 3.5.9 Commands to Initialize Extended Endpoints EP1 OUT, EP4OUT, and EP8IN .. 3.5.10 Getting EP1OUT Data....................................................................................22 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 3.5.1.1 FIFOADDR Lines .............................................................................17 3.5.1.2 Read: SLOE and SLRD ...................................................................18 3.5.1.3 Write: SLWR ....................................................................................18 3 ...
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... INPKTEND/FLUSH Register 0x20 ............................................................................ 48 6.11 USBFRAMEH/L Registers 0x2A, 0x2B ..................................................................... 49 6.12 MICROFRAME Registers 0x2C ................................................................................ 49 6.13 FNADDR Register 0x2D............................................................................................ 49 6.14 INTENABLE Register 0x2E ....................................................................................... 50 6.15 Extended Interrupt INTENABLE1 Register 0x2F....................................................... 51 4 TACK36 6.8.3.1 IN Endpoints .................................................................................... 47 6.8.3.2 OUT Endpoints ................................................................................ 48 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * ...
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... DREQ Waveform Generation with FLAGB ................................................................68 10.2.1 OUT Packet Read Bursts...............................................................................68 10.2.2 IN Packet Write Bursts ...................................................................................69 11. Package Diagrams 11.1 56-pin SSOP Package...............................................................................................71 11.2 56-pin QFN Package .................................................................................................72 11.3 56-pin VFBGA Package.............................................................................................73 Index CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Contents ...
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... Contents 6 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Support Technical Support can be reached at at: 1-800-541-4736. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Description Describes the purpose of this guide, overviews each chapter, supplies product support and upgrade information, and acronyms. This chapter lists the document history and the document conventions. ...
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... Added Extended Short Packet information in the Putting EP6IN *A ARI Data–Short Packet section and in the Command List section. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Description of Change ...
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... Synchronous or Asynchronous interface ❐ Targeted to CY7C68013/14/53A FX2LP in 56 pin SSOP, QFN, and VFBGA packages ■ Complies with most device class specifications ■ Supports Microsoft’s PMP (Portable Media Player) specification ■ CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 9 ...
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... I2C Bus Controller (Master Only) SDA PLL TM MoBL-USB Bridge Firmware on FX2LP(18) CY Smart USB 2 KB FS/HS Engine FIFO CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A IFCLK* Read*, Write*, OE*, PKTEND*, CS# Interrupt#, Ready Flags (3/4) Address (3) Control FIFO Data 16-Bit Data Bus Data ...
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... Each reference design kit comes complete with firmware source code and object code, schematics, and documentation. See the Cypress web site at http://www.cypress.com. 2.2.1 System Diagram MoBL-USB™ Bridge Solution Example RF CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Figure 2-2. Example USB System Diagram Slave I/F Baseband Modem ...
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... Or Status IN Packets Or Control Run Bridge Program Suspend Resume Sleep IN Commands Or IN Data FIFOs CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Bridge System States I2C Master Bridge Program Image Image Commands Command Mailbox IRQs Interrupt Mailbox OUT Commands Or OUT Data ...
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... CY7C68013A-56BAXC Development Tool Kit CY3684 CY3687 Reference Design Kit CY4624 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Package Type FX2LP 56 SSOP – Lead-free FX2LP 56 QFN – Lead-free FX2LP 56 VFBGA – Lead-free FX2LP18 56 VFBGA – Lead-free FX2LP 56 SSOP – Lead-free FX2LP 56 SSOP – ...
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... Introduction 14 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... RC network (R = 100K ohms 0.1 µf) is used to provide the RESET# signal. The clock must stable state for at least 200 µs before the RESET is released. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 2 C™ interface speed to approximately 100 KHz or the default speed. If this ...
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... A single-buffered command interface, which is used to set up the Bridge firmware, read the sta- tus, load the descriptors, and access Endpoints 0 and 1. The extended endpoints 4 and 8 are also accessed through the command interface. 16 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... The optional CS# signal tri-states the data bus and ignores SLRD and SLWR. Since the Bridge only supports 16 bit wide data, the PKTEND is typically not used since it does not allow odd CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A USB ...
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... An external master accesses the FIFOs through the data bus, FD [15:0]. This bus must be set for 16 bits wide; the width is selected via the WORDWIDE bit in the EPxPKTLENH/L registers. The data 18 provides further information on how to access this register CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Command List on ...
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... EF for the OUT endpoint EP2 and a FLAG pin configured as FF for the IN endpoint EP6 indexed mode, the value of the FLAGx pins is indeterminate except when addressing a FIFO (FIFOADR[2:0]={000,001,010,011}). CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 1 Applications configure EP2 as an OUT endpoint and typically ...
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... Dummy Write(0) to Addr 4 – CMD Done Example Write the byte <10110000> into the IFCONFIG register (0x01). 1. Wait for READY (pin signal or CMDRDY interrupt). 2. Select FIFOADR [0 1 1]. 20 MoBL-USB ) RegAddr RegValue Interrupt – Write Complete CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... EP1OUTEN, EP4OUTEN, EP8INEN. Each of these commands takes two parameters: enable and mode. The enable parameter enables or disables the endpoint. The mode command specifies whether the endpoint is an Interrupt type endpoint or a bulk type endpoint. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A MoBL-USB ) RegAddr Interrupt – ...
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... Wait for EP1OUTPKTAVAIL with length interrupt. 5. Read length bytes at FIFOADR [0 0 1]. 6. Repeat at step 4. 3.5.11 Getting EP2OUT Data Figure 3-5. Read OUT Data External Master Flag Transition or OUTNE Interrupt 22 MoBL-USB Read Data MoBL-USB Read Data CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Read short packet length data from FIFOADR [0 0 0]. 10.Go to step 4. Note that steps 7 and 8 are not required if the BYPASS_OUT_SHORT_PKT_ACK command was sent prior to starting transfers. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A MoBL-USB Read Short Packet Data Functional Overview ...
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... Write 0x80+packet length on the high byte and 0x00 on the low byte at FIFOADR [ com- mit the packet. 4. Wait for EP1INBUFAVAIL interrupt step 1. 24 MoBL-USB Read Data MoBL-USB ) to Addr 4 – CMD Done EP1INBUFAVAIL Interrupt CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Write bytes (Full Speed 512 bytes (High Speed) of packet data at FIFOADR [0 1 1]. 7. Write 0x40+upper packet length bits on the high byte and lower packet length bits on the low byte at address [ commit the packet step 4. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * EP1IN PL5 ...
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... Not waiting can result in next packet data getting written into the short packet buffer. Note When using the Flag pin for IN buffer signaling, use the Extended In Short Packet command. 26 MoBL-USB MoBL-USB CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... HOST_RESUME extended interrupt. On some hosts, or with standby settings adjusted to turn off VBus power during suspend, the exter- nal master should follow the Cable Unplug Initiated Suspend. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 37. Functional Overview ...
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... For applications using the passthrough enumeration, the normal enumeration setup request sequence occurs. The external master must then send the WAKEUP_USB_ACTIVITY com- mand to enable USB wakeups to prepare for any host initiated suspend. 28 MoBL-USB (IFCONFIG, SUSPEND) Host Wake Up HOST_RESUME Interrupt CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Figure 3-13. USB Cable Unplug External Master VBUS Removed WAKEUP_USB_ACTIVITY(Off) WRITE_REGISTER( VBUS Restored Assert Wakeup Pin CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A MoBL-USB IFCONFIG, DISCON+SUSPEND READY Interrupt ENUMERATE() Functional Overview ) 29 ...
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... Sent to cause Bridge to bypass the wait for OUT_SHORT_PKT_ACK com- mands. 0x24 EP Enable EP=0 Endpoint2 Enable Bypass 1=Enable 0=Disable Sent in response to USBReset Interrupt to unblock EP1IN and EP8IN 0x25 packets. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Notes EP=4: Endpoint4 EP=8: Endpoint8 EP=4: Endpoint4 EP=8: Endpoint8 EP=2: Endpoint2OUT ...
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... If the descriptor ends on a 32-byte boundary, write one more descriptor with a zero length by following steps one through five. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Resets and Wakeup on page MoBL-USB ...
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... Set SETUP Passthrough On command. When 32 MoBL-USB USB Reset Interrupt Flush FIFOs ENUMOK Interrupt Default Descriptor chapter on page CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Default Descriptor chapter on 55. The default descriptor can ...
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... The external master must Stall EP0 for any unrecognized commands. Again, the Bridge automatically responds to the special Test Set Feature request. Figure 4-4. USB Reset (Passthrough Mode On) External Master SETUP(Get Descriptor) Interrupts SETUP(Set Configuration) Interrupt CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A MoBL-USB Ready Interrupt Initialize registers Enumerate() Enumerate ...
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... Interrupt Status. This interrupt signals data availability on the Com- mand OUT interface. This interrupt is always enabled for normal operations. The corresponding bit in the INTENABLE register enables the CMDRDY extended interrupt. 34 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Endpoint 0 chapter on Endpoint 0 chapter on page 37. ...
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... PL[7:0]. This interrupt is always enabled. 0001: EP2OUTSHORTPKTAVAIL - Indicates EP2OUT short data packet is available at FIFO ■ address [001] and the short packet length is in PL[9:0]. This interrupt is always enabled. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * ...
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... These bits indicate the size of an OUT packet. They are used with the EP2OUTSHORTPKTAVAIL, the EP1OUTPKTAVAIL, and the EP4OUTPKTAVAIL extended interrupts. 4.4.3.5 EP[3:0] - Endpoint Number for INNF, OUTNE, and INSHORTPKTACK 0010: Endpoint 2 ■ 0110: Endpoint 6 ■ 36 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... IN phase of the transac- tion. 10.Wait for READY (pin signal or CMDRDY interrupt). 11. Select FIFOADR [0 1 1]. 12.Write 0x06 to complete the SETUP transaction. 13.Select FIFOADR[1 0 0]. 14.Write 0x0000 to FIFOADR commit the Setup Done command. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 37 ...
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... Stall bit for the endpoint specified in the request and then sends the request to the external mas- ter via the SETUP interrupt. The external master must send the SETUP Complete command to the Bridge to allow it to terminate the SETUP request. 38 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Force Packet End / Flush FIFOs FLUSH USB Configuration 2A 1 USBFRAMEH USB Frame count USBFRAMEL USB Frame count MICROFRAME Microframe count, 0 FNADDR USB Function address CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * IFCLKSRC 3048MHZ IFCLKOE IFCLKPOL ASYNC FLAGB3 FLAGB2 FLAGB1 FLAGB0 FLAGA3 FLAGD3 ...
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... EP6INNF reserved reserved reserved CLKSPD1 CLKSPD0 IFCLKOE IFCLKPOL ASYNC R/W R/W R CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * Default Access ENUMOK UNUSED READY 11011101 bbbbbbbb reserved reserved EP2OUTNE 00000000 bbbbbbbb 0000000 wwwwww CLKINV CLKOE reserved 00010010 rrrbbbbr 0x01 STANDBY ...
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... Bit Name FLAGB3 FLAGB2 Read/Write R/W R/W Default 0 0 FLAGSCD Bit # 7 6 Bit Name FLAGD3 FLAGD2 Read/Write R/W R/W Default 0 0 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * FLAGB1 FLAGB0 FLAGA3 R/W R/W R FLAGD1 FLAGD0 FLAGC3 R/W R/W R/W ...
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... FLAGD = CS# (actual FIFO is selected by FIFOADR[2:0] pins Reserved 1 0 Reserved 1 1 Reserved 0 0 EP2 Reserved 1 0 EP6 Reserved 0 0 EP2 Reserved 1 0 EP6 Reserved 0 0 EP2 Reserved 1 0 EP6 Reserved Table 3-1 on page 17. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Pin Function ...
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... FIFO is empty the EF pin is pulled HIGH when the FIFO is empty. Bit 0: FF This flag selects the polarity of the FF pin (FLAGA/B/C/D (default), the FF pin is pulled low when the FIFO is full the FF pin is pulled HIGH when the FIFO is full. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * ...
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... X X Table 6-1 on page 39). Only the TYPE bits should be changed TYPE1 TYPE0 SIZE R/W R/W R TYPE1 TYPE0 0 R/W R CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 0x05 Minor Minor Minor R/W R/W R 0x06, 0x08 STALL BUF1 BUF0 R/W R/W R 0x09 ...
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... FIFOs are operating synchronously according to an internally or externally supplied clock. Having the FIFO flag indications one sample early simplifies some synchronous interfaces. This applies only to IN endpoints. Default is INFM1 = 0. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Table 6-3. The TYPE bits apply to all of the end- ...
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... R/W Default PFC5 PFC4 PFC3 R/W R/W R IN: PKTS[2] IN: PKTS[1] IN: PKTS[0] OUT: PFC12 OUT: PFC11 OUT: PFC10 R/W R/W R CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 0x13, 0x17 PFC2 PFC1 PFC0 R/W R/W R 0x12, 0x16 PFC9 PFC8 R/W R/W R ...
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... Table 6-4. PKTS Bits PKTS2 When PKTSTAT = 1, the PF considers when there are PFC bytes in the FIFO, no matter how many packets are in the FIFO. The PKTS[2:0] bits are ignored. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * PFC5 PFC4 PFC3 R/W ...
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... FIFO bit, the Bridge firmware logic flushes the selected FIFO. For example set- ting bit 6 flushes endpoint 6 FIFO R/W R/W R R/W R/W R FIFO2 EP3 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 0x1E EP2PF EP2EF EP2FF R/W R/W R 0x1F EP6PF EP6EF EP6FF R/W R/W R 0x20 EP2 EP1 EP0 ...
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... Bridge firmware copies into this register. There is normally no reason for the external master to know its USB device address because the Bridge firmware automatically responds only to its assigned address. FNADDR Bit # 7 6 Bit Name HSGRANT FA6 Read/Write R R Default 0 0 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * ...
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... Bit 0: READY Setting this bit to a ’1’ enables an interrupt when the Bridge firmware has powered on and performed an internal self-test UNUSED USB RESET CMDRDY R/W R/W R CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 0x2E ENUMOK UNUSED READY R/W R/W R ...
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... Bridge commits a packet from the USB to the FIFO interface signaling to the external master that a packet is available and can be read from the Bridge by the master. The interrupting endpoint is identified in the lower byte of the OUTNE interrupt. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * ...
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... This bit is used to enable the CPU clock output on the CLKOUT pin. The default for this bit is [1] which selects clock output enabled. 0: CLKOUT pin is driven ■ 1: CLKOUT pin floats ■ reserved CLKSPD1 CLKSPD0 R/W R/W R CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 0x32 0x32 CLKINV CLKOE reserved R/W R ...
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... Send High Byte of the Register Address (0xE6). Write Register (Register ID - 0x3B) with value = 0xE6. 3. Send the actual value to write to the Register Address (in this case 0x10). Write Register (Register ID = 0x3C) with value = 0x10. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Register Summary 53 ...
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... Register Summary 54 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A //Descriptor length //Descriptor type //Specification Version (BCD) //Device class //Device sub-class //Device sub-sub-class //Maximum packet size //Manufacturer string index //Product string index //Serial number string index //Number of configurations ...
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... Length (LSB) //Total Length (MSB) //Number of interfaces //Configuration number //Configuration string //Attributes (b7 - buspwr selfpwr rwu) //Power requirement (div 2 ma) CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A //Descriptor length //Descriptor type //Zero-based index of this interface //Alternate setting //Number of end points //Interface class //Interface sub class //Interface sub sub class //Interface descriptor string index ...
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... Default Descriptor //StringDscr1 16, 3, 'C',00, 'y',00, 'p',00, 'r',00, 'e',00, 's',00, 's',00, //StringDscr2 20, 3, 'C',00, 'Y',00, '7',00, 'C',00, '6',00, '8',00, '0',00, '0',00, '2',00, 58 //String descriptor length //String Descriptor //String descriptor length //String Descriptor CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... VCC 18 GND 19 *IFCLK 20 21 RESERVED 22 SCL CY7C68013A SDA 23 Pin Functions VCC 24 FD0 25 FD1 26 FD2 27 FD3 Denotes programmable polarity. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 1 FD12 56 55 FD11 54 FD10 53 FD9 FD8 52 *WAKEUP 51 VCC 50 RESET# 49 GND 48 *FLAGD/CS *PKTEND 45 FIFOADR1 ...
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... XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 * IFCLK 13 RESERVED Denotes programmable polarity. 60 Figure 8-2. 56-pin QFN Pin Assignment CY7C68001 56-pin QFN CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * RESET# 41 GND * 40 FLAGD/CS PKTEND 38 FIFOADR1 37 FIFOADR0 36 FIFOADR2 * 35 SLOE 34 INT# 33 READY 32 ...
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... VFBGA Figure 8-3. 56-pin VFBGA Pin Assignment - Top View CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * Pin Assignments ...
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... FD[3]. This is the bidirectional FIFO/Command data bus. I/O/Z I FD[4]. This is the bidirectional FIFO/Command data bus. I/O/Z I FD[5]. This is the bidirectional FIFO/Command data bus. I/O/Z I FD[6]. This is the bidirectional FIFO/Command data bus. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Description ...
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... Reserved WAKEUP SCL SDA CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Type Default I/O/Z I FD[7]. This is the bidirectional FIFO/Command data bus. I/O/Z I FD[8]. This is the bidirectional FIFO data bus. I/O/Z I FD[9]. This is the bidirectional FIFO data bus. I/O/Z I FD[10]. This is the bidirectional FIFO data bus. ...
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... N/A Connect to ground. N/A Connect to ground. N/A Connect to ground. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Description connect to 1.8V - 3.3V power source.) connect to 1.8V power source.) connect to 1.8V - 3.3V power source.) connect to 1.8V - 3.3V power source.) connect to 1.8V power source.) ...
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... PB0-PB7/FD0-FD7 FD0-FD7 PD0-PD7/FD8-FD15 FD8-FD15 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Description READY indicates that the Bridge firmware is ready for commands (the command buffer has space for additional commands). This pin is NOT the same as the READY interrupt. This pin is high-impedance for a short time at startup. ...
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... External Interface Description 66 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... FLAG B -> DREQ. Allows throttling of the DMA request flow. ■ CS# -> CS. Chip select (CS# function of Bridge FLAG D) localizes addressing of the Bridge on a ■ common address bus. CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A Figure 10-1 IFCLK INT Interrupt Ready OUT EP2 Empty / ...
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... When the FIFO goes empty, a high to low transition occurs, creating a DMA request termina- tion. This waveform throttles the DMA request line indefinitely or until the DMA transfers a preset amount of data. Figure 10-2. OUT Packet Read Bursts 68 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Reprogramming FLAGB as an Endpoint 6 FIFO full flag creates a low to high transition for the DREQ signal which remains high until the full flag condition occurs. When the Endpoint 6 FIFO buffer goes full, FLAGB asserts and throttles a DMA burst transfer. Figure 10-3. IN Packet Write Bursts CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A DMA Interface 69 ...
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... DMA Interface 70 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... Package Diagrams 11.1 56-pin SSOP Package Figure 11-1. 56-lead Shrunk Small Outline Package O56 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 51-85062-*C 71 ...
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... Package Diagrams 11.2 56-pin QFN Package Figure 11-2. 56-Lead QFN LF56A 72 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A 51-85144-*G ...
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... Figure 11-3. 56 VFBGA ( 1.0 mm) 0.50 Pitch, 0.30 Ball BZ56 TOP VIEW PIN A1 CORNER 5.00±0.10 SIDE VIEW -C- SEATING PLANE CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version * REFERENCE JEDEC: MO-195C PACKAGE WEIGHT: 0.02 grams Package Diagrams BOTTOM VIEW Ø0. Ø0. CORNER Ø0.30±0.05(56X ...
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... Package Diagrams 74 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...
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... RAM organization 16 EP2PKTLENL register 45 EP6PKTLENL register 45 EPxCFG register 44 example code 55 external interface 16 external master 32 external master processors 67 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A F features 9 FIFO configuration, of flag pins 19 default programmable flag setup 19 programmable flag setup 19 FIFO access 18 ...
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... REVID register 44 S setup commands 37 standby sequences 27 system diagram 11 T typical applications 10 U USB cable unplug 29 USB reset 16 W wakeup 16 write EP1IN data 24 write EP8IN data 25 write IN data 26 write short IN data 26 76 CY4625 MoBL-USB™ Bridge Firmware Guide, Document # 001-15686 Version *A ...