M8340103K2200JAD05 Vishay, M8340103K2200JAD05 Datasheet - Page 3

• Manufacturer Part Number: M8340103K2200JAD05
• Description: DFM14-11 220 5% K M8340103K2200JA D05
• Manufacturer: Vishay
• Type: Networkr

Specifications of M8340103K2200JAD05

• Technology: Thick Film
• Resistance: 220Ohm
• Power Rating: 7/20W
• Power Rating Per Resistor: 1/20W
• Number Of Resistors: 7
• Tolerance (+ Or -): 5%
• Circuit Designator: ISOL
• Package / Case: Flat
• Mounting Style: Through Hole
• Temperature Coefficient: ±100
• Military Standard: MIL-PRF-83401
• No. Of Terminals: 14
• Case Style: Ceramic
• Termination Style: Pin
• Terminal Pitch: 1.27
• Product Length (mm): 9.78mm
• Product Depth (mm): 7.75mm
• Product Height (mm): 1.91mm
• Lead Free Status / RoHS Status: Not Compliant

DFM (Military M83401)
Vishay Dale
www.vishay.com
420
CIRCUIT APPLICATIONS
11 Schematic
12 Schematic
15 Schematic
1
R2
14
R1
R1
R2
R2
Pin #1
Pin #1
R1
R1
R2
R2
•
R1
R1
DFM1415
CAGE CODE: 91637
R2
R2
•
DFM1411
DFM1412
•
R1
R1
Thick Film Resistor Networks, Military, MIL-PRF-83401 Qualified,
•
R2
R2
•
R1
R1
R2
R2
•
•
R1
R1
R2
For technical questions, contact:
The DFM1411 provides the user with 7 nominally equal resistors with each resistor isolated from
all others. Commonly used in the following applications:
• “Wired OR” pull-up
• Power driven pull-up
• TTL input pull-down
The DFM1412 provides the user with a choice of 13 nominally equal resistors, each connected
to a common pin. Commonly used in the following applications:
• MOS/ROM pull-up/
• pull-down
• Open Collector pull-up
The DFM1415 provides the user with a choice of 12 pairs of R1/R2 resistor values for pulse
squaring and TTL dual-line terminating requirements.
Type RZ030, Flat Pack
[e-mail]
DFM1411 (M8340103xxxxxxA)
• Line termination
• ECL output pull-down
• Long-line impedance balancing
DFM1412 (M8340103xxxxxxB)
13 resistors with one pin common
• “Wired OR” pull-up
• Power driven pull-up
• TTL unused gate pull-up
DFM1415 (M8340103xxxxxxJ)
12 pairs of resistors
7 isolated resistors
• LED current limiting
• Power gate pull-up
• Digital pulse squaring
• TTL input pull-down
• High speed parallel pull-up
Document Number: 31517
Revision: 03-Mar-10