XC4VLX60-10FF1148C Xilinx Inc, XC4VLX60-10FF1148C Datasheet

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XC4VLX60-10FF1148C

Manufacturer Part Number
XC4VLX60-10FF1148C
Description
IC
Manufacturer
Xilinx Inc
Datasheet

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DS112 (v3.0) September 28, 2007
General Description
Combining Advanced Silicon Modular Block (ASMBL™) architecture with a wide variety of flexible features, the Virtex™-4
Family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC
technology. Virtex-4 FPGAs comprise three platform families—LX, FX, and SX—offering multiple feature choices and
combinations to address all complex applications. The wide array of Virtex-4 hard-IP core blocks includes the PowerPC™
processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP
slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4 building blocks
are enhancements of those found in the popular Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X product families,
so previous-generation designs are upward compatible. Virtex-4 devices are produced on a state-of-the-art 90-nm copper
process using 300-mm (12-inch) wafer technology.
Summary of Virtex-4 Family Features
Table 1: Virtex-4 FPGA Family Members
DS112 (v3.0) September 28, 2007
Product Specification
XC4VLX15
XC4VLX25
XC4VLX40
XC4VLX60
XC4VLX80
XC4VLX100
XC4VLX160
XC4VLX200 192 x 116 200,448 89,088
Device
Three Families — LX/SX/FX
-
-
-
Xesium™ Clock Technology
-
-
-
XtremeDSP™ Slice
-
-
-
Smart RAM Memory Hierarchy
-
-
-
© 2004–2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
PowerPC is a trademark of IBM, Inc. All other trademarks are the property of their respective owners. All specifications are subject to change without notice.
Virtex-4 LX: High-performance logic applications solution
Virtex-4 SX: High-performance solution for digital signal
processing (DSP) applications
Virtex-4 FX: High-performance, full-featured solution for
embedded platform applications
Digital clock manager (DCM) blocks
Additional phase-matched clock dividers (PMCD)
Differential global clocks
18 x 18, two’s complement, signed Multiplier
Optional pipeline stages
Built-in Accumulator (48-bit) and Adder/Subtracter
Distributed RAM
Dual-port 18-Kbit RAM blocks
·
·
High-speed memory interface supports DDR and DDR-2
SDRAM, QDR-II, and RLDRAM-II.
Optional pipeline stages
Optional programmable FIFO logic automatically
remaps RAM signals as FIFO signals
Row x Col
128 x 36
128 x 52
160 x 56
192 x 64
192 x 88
64 x 24
96 x 28
Array
Configurable Logic Blocks (CLBs)
(3)
110,592 49,152
152,064 67,584
13,824
24,192
41,472
59,904
80,640
Logic
Cells
R
10,752
18,432
26,624
35,840
Slices
6,144
Distributed
RAM (Kb)
1056
1392
Max
168
288
416
560
768
96
(1)
XtremeDSP
Slices
32
48
64
64
80
96
96
96
0
0
(2)
www.xilinx.com
Blocks
18 Kb
160
200
240
288
336
48
72
96
0
Block RAM
RAM (Kb)
Virtex-4 Family Overview
Product Specification
1,296
1,728
2,880
3,600
4,320
5,184
6,048
Block
Max
864
SelectIO™ Technology
-
-
-
-
Flexible Logic Resources
Secure Chip AES Bitstream Encryption
90-nm Copper CMOS Process
1.2V Core Voltage
Flip-Chip Packaging including Pb-Free Package
Choices
RocketIO™ 622 Mb/s to 6.5 Gb/s Multi-Gigabit
Transceiver (MGT) [FX only]
IBM PowerPC RISC Processor Core [FX only]
-
-
Multiple Tri-Mode Ethernet MACs [FX only]
DCMs PMCDs
1.5V to 3.3V I/O operation
Built-in ChipSync™ source-synchronous technology
Digitally controlled impedance (DCI) active termination
Fine grained I/O banking (configuration in one bank)
PowerPC 405 (PPC405) Core
Auxiliary Processor Unit Interface (User Coprocessor)
12
12
12
12
4
8
8
8
0
4
4
4
8
8
8
8
Processor
PowerPC
Blocks
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Ethernet
MACs
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Transceiver
RocketIO
Blocks
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Banks
Total
I/O
11
13
13
15
17
17
17
9
User
Max
320
448
640
640
768
960
960
960
I/O
1

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XC4VLX60-10FF1148C Summary of contents

Page 1

... Row x Col Cells Slices XC4VLX15 13,824 6,144 XC4VLX25 24,192 10,752 XC4VLX40 128 x 36 41,472 18,432 XC4VLX60 128 x 52 59,904 26,624 XC4VLX80 160 x 56 80,640 35,840 XC4VLX100 192 x 64 110,592 49,152 XC4VLX160 192 x 88 152,064 67,584 XC4VLX200 192 x 116 200,448 89,088 © 2004–2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. ...

Page 2

R Table 1: Virtex-4 FPGA Family Members (Continued) Configurable Logic Blocks (CLBs) (3) Array Logic Device Row x Col Cells Slices XC4VSX25 23,040 10,240 XC4VSX35 34,560 15,360 XC4VSX55 128 x 48 55,296 24,576 XC4VFX12 ...

Page 3

R SelectIO Technology • 960 user I/Os • Wide selections of I/O standards from 1.5V to 3.3V • Extremely high-performance - 600 Mb/s HSTL & SSTL (on all single-ended I/ Gb/s LVDS (on all differential I/O ...

Page 4

R Architectural Description: Virtex-4 Array Overview Virtex-4 devices are user-programmable gate arrays with various configurable elements and embedded cores opti- mized for high-density and high-performance system designs. Virtex-4 devices implement the following function- ality: • I/O blocks provide the interface ...

Page 5

R General purpose I/O in select locations (four per bank) are designed to be "regional clock capable" I/O by adding spe- cial hardware connections for I/O in the same locality. These regional clock inputs are distributed within a limited region ...

Page 6

R Virtex-4 FX Family This section briefly describes blocks available only in FX devices. RocketIO Multi-Gigabit Transceiver 8 – 24 Channels RocketIO Multi-Gigabit Serial Transceivers (MGTs) capable of running 622 Mb/s – 6.5 Gb/s • Full Clock and Data Recovery ...

Page 7

... FF668 (1,2) Package SFG363 FFG668 Size Device MGTs I/O MGTs XC4VLX15 N/A 240 N/A XC4VLX25 N/A 240 N/A XC4VLX40 N/A XC4VLX60 N/A XC4VLX80 XC4VLX100 XC4VLX160 XC4VLX200 XC4VSX25 N/A XC4VSX35 N/A XC4VSX55 XC4VFX12 N/A 240 N/A XC4VFX20 XC4VFX40 XC4VFX60 XC4VFX100 XC4VFX140 Notes: 1. ...

Page 8

R Virtex-4 Documentation Complete and up-to-date documentation of the Virtex-4 family of FPGAs is available on the Xilinx web site. In addi- tion to the most recent Virtex-4 Family Overview, the follow- ing files are also available for download: Virtex-4 ...

Page 9

... XC4VSX25, XC4VSX35, and XC4VFX12 devices. 09/28/07 3.0 All Virtex-4 devices released to Production status. See DS302, Virtex-4 Data Sheet, for full particulars. No changes in this document from previous revision. DS112 (v3.0) September 28, 2007 Product Specification Revision 2: Corrected to remove FF676 package offerings in XC4VLX40, XC4VLX60, www.xilinx.com Virtex-4 Family Overview 9 ...

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