24LCS52-I/MS Microchip Technology, 24LCS52-I/MS Datasheet - Page 8

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24LCS52-I/MS

Manufacturer Part Number
24LCS52-I/MS
Description
IC,SERIAL EEPROM,256X8,CMOS,TSSOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Datasheet

Specifications of 24LCS52-I/MS

Rohs Compliant
YES
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
24LCS52I/MS
24AA52/24LCS52
5.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W =
busy with the write cycle, then no ACK will be returned.
If the cycle is complete, then the device will return the
ACK and the master can then proceed with the next
Read or Write command. See Figure 5-1 for flow
diagram.
FIGURE 5-1:
DS21166J-page 8
ACKNOWLEDGE POLLING
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Acknowledge
Condition to
Send Stop
(ACK = 0)?
Did Device
Send Start
Operation
Send
Next
ACKNOWLEDGE
POLLING FLOW
Yes
0
). If the device is still
No
© 2005 Microchip Technology Inc.

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