AD-MSDPDX900-EVB Analog Devices Inc, AD-MSDPDX900-EVB Datasheet - Page 8

• Manufacturer Part Number: AD-MSDPDX900-EVB
• Description: Xilinx FMC Interface
• Manufacturer: Analog Devices Inc
• Type: Transmitterr

Specifications of AD-MSDPDX900-EVB

• Frequency: 820MHz ~ 1.05GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Xilinx FMC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

AD-MSDPD-EVB
THEORY OF OPERATION
MAIN Tx PATH
The transmit path is responsible for taking complex I and Q
signals and converting them into an appropriate RF signal. This
is accomplished by using the modulation capabilities built into
the
DAC upsamples the data to 983.04 MSPS and applies a frequency
translation of 184.32 MHz to the data stream. Although zero IF
can be used, using complex IF shifts the main signal away from
dc where LO feedthrough and images can be easily filtered and
otherwise mitigated.
The complex analog output from the DAC feeds an
quadrature modulator via an appropriate filter and matching
stage, where it is translated to the specified RF output frequency.
This signal is then passed through an image rejection filter to
an
and, finally, to an ADL532x to drive the output. RF output power
control is accomplished either by adjusting the baseband data
or by controlling the voltage on the PIN diode.
RF outputs up to 2.7 GHz can be synthesized with this board at
power levels up to 18 dBm. Analog power control of up to 12 dB
can be achieved with analog gain control depending on the RF
output. Additional control is achieved with baseband data control.
OBSERVATION Rx PATH
The observation path consists of an ADL536x mixer, which
is responsible for directly mixing the observed RF signal to a
suitable IF. The typical IF frequency is 184.32 MHz but can be
changed based on application requirements. The IF signal is
filtered and then passed to an
24 dB of gain range. An antialias filter is used to remove harmonics
and other out-of-band signals before the signal is digitized with
an
CLOCK CLEAN-UP
An
clock clean-up facilities. The reference input comes from the
on-board 30.72 MHz reference crystal or from an external
reference of n times 30.72 MHz or n times 38.4 MHz. Because
a narrow loop filter and VCXO are used, much of the wideband
noise on the reference clock is attenuated. The output of the clock
clean-up function is used as a reference for the clock synthesis
and LO synthesis.
ADL5541
AD9230
AD9122
ADF4002
12-bit, 250 MSPS ADC.
high speed digital-to-analog converter (DAC). The
for gain followed by a PIN diode for power control,
with a 122.88 MHz VCXO is used to provide
AD8375
DVGA, which provides
ADL5375
Rev. 0 | Page 8 of 12
CLOCK SYNTHESIS
An
clean-up to synthesize the ADC sample clock, the DAC sample
clock, and all other system clocks, including any signaling needed
to interface to the FPGA and SERDES Tx signals. The AD9516
includes an on-chip VCO that runs nominally at 1966.08 MHz
and is divided down to achieve the individual clock signals used.
Other VCO frequencies can be used to support other clock rates,
including those typically used in China.
LO SYNTHESIS
A number of options exist for local oscillator synthesis, including
the option to use external LOs for both the Tx and Rx paths.
The on-board synthesis is accomplished by first synthesizing a
26.0 MHz reference from the 122.88 MHz reference clock. This
frequency is used because of the ease of generating 200 kHz rasters
for some air standards. This is not strictly required and can be
bypassed if desired; however, bypassing can result in odd frequency
steps that may need to be accounted for by shifting the baseband
data. Although shifting the baseband data is not difficult, many
customers prefer not to shift their baseband data.
The 26.0 MHz reference is passed to a fractional N PLL and
selected external VCO, which is used to generate the Tx local
oscillator. An external VCO was chosen because of its superior
phase noise characteristics, making it suitable for multicarrier GSM
applications. In applications where the Tx and Rx IF frequencies
are the same, this local oscillator may be shared. The MSDPD
board supports this sharing as the primary option. A secondary
synthesizer, the ADF4350, is provided and may be used when the
Rx IF is different from the Tx IF. This PLL includes an on-chip
VCO. In applications where the ADF4350 is not required for the
Rx LO, this synthesizer can be used to synthesize other signals
needed elsewhere in the design.
AD9516
uses the 122.88 MHz reference from the clock