AD5207BRUZ50 Analog Devices Inc, AD5207BRUZ50 Datasheet - Page 10

• Manufacturer Part Number: AD5207BRUZ50
• Description: DUAL 8-BIT POTENTIOMETER TAPE AND REEL
• Manufacturer: Analog Devices Inc

Specifications of AD5207BRUZ50

• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 2
• Temperature Coefficient: 500 ppm/°C Typical
• Memory Type: Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V, ±2.2 V ~ 2.7 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Resistance In Ohms: 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5207
The data setup and data hold times in the specification table
determine the data valid time requirements. The last ten bits of
the data word entered into the serial register are held when CS
returns high and any extra bits are ignored. At the same time, when
CS goes high, it gates the address decoder enabling one of two
positive edge-triggered AD5207 RDAC latches; see Figure 5 detail.
The target RDAC latch is loaded with the last eight bits of the
data word to complete one RDAC update. For AD5207, it
cannot update both channels simultaneously and therefore, two
separate 10-bit data words must be clocked in to change both
VR settings.
All digital inputs are protected with a series input resistor and
parallel Zener ESD structure shown in Figures 6 and 7. Applies
to digital input pins CS, SDI, SDO, SHDN, and CLK. Digital
input level for Logic 1 can be anywhere from 2.4 V to 5 V
regardless of whether it is in single or dual supplies.
SHDN
CLK
SDI
CS
CLK
SDI
CS
REGISTER
SERIAL
DIGITAL PIN
AD5207
A,B,W
D
CK RS
INTERNAL
340
RS
Q
V
SS
V
SS
REGISTER
DECODE
SERIAL
ADDR
LOGIC
RDAC1
RDAC2
SDO
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between Terminals A and
B is available with values of 10 kΩ, 50 kΩ, and 100 kΩ. The last
few digits of the part number determine the nominal resistance
value, e.g., 10 kΩ = 10; 50 kΩ = 50; and 100 kΩ = 100. The
nominal resistance (R
accessed by the wiper terminal, plus the B Terminal contact.
The 8-bit data in the RDAC latch is decoded to select one of
the 256 possible settings. Assume a 10 kΩ part is used, the
wiper’s first connection starts at the B Terminal for data 00
Since there is a 45 Ω wiper contact resistance, such connection
yields a minimum of 45 Ω resistance between Terminals W and
B. The second connection is the first tap point corresponds to
84 Ω (R
third connection is the next tap point representing 123 Ω (39 ×
2 + 45) for data 02
the wiper up the resistor ladder until the last tap point is reached at
10006 Ω (R
gram of the equivalent RDAC circuit.
The general equation determining the programmable output
resistance between W and B is:
where D is the data contained in the 8-bit RDAC latch, and R
is the nominal end-to-end resistance.
For example, R
tied to W. The following output resistance R
the following RDAC latch codes.
R
WB
( )
WB
D
= R
AB
=
256
– 1 LSB + R
AB
D
AB
SHDN
/256 + R
=10 kΩ, A Terminal can be open-circuit or
H
×
DECODER R
D7
D6
D5
D4
D3
D2
D1
D0
LATCH
and so on. Each LSB value increase moves
R
RDAC
AND
AB
AB
) of the VR has 256 contact points
+
W
W
R
= 39 Ω + 45 Ω) for data 01
R
R
R
). Figure 8 shows a simplified dia-
W
S
S
S
S
WB
Ax
Wx
Bx
will be set for
H
. The
(1)
AB
H
.