AD5220BR10 Analog Devices Inc, AD5220BR10 Datasheet - Page 8

• Manufacturer Part Number: AD5220BR10
• Description: Digital Potentiometer (Pots) IC
• Manufacturer: Analog Devices Inc

Specifications of AD5220BR10

• Potentiometer Ic Case Style: SOIC
• Peak Reflow Compatible (260 C): No
• End To End Resistance: 10ohm
• No. Of Pots: Single
• Leaded Process Compatible: No
• No. Of Pins: 8
• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Taps: 128
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 800 ppm/°C Typical
• Memory Type: Volatile
• Interface: Up/Down Counter
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Resistance In Ohms: 10K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD5220
OPERATION
The AD5220 provides a 128-position digitally controlled vari-
able resistor (VR) device. Changing the VR settings is accom-
plished by pulsing the CLK pin while CS is active low. The
direction of the increment is controlled by the U/D (UP/DOWN)
control input pin. When the wiper hits the end of the resistor
(Terminals A or B) additional CLK pulses no longer change
the wiper setting. The wiper position is immediately decoded
by the wiper decode logic changing the wiper resistance. Ap-
propriate debounce circuitry is required when push button
switches are used to control the count sequence and direction
of count. The exact timing requirements are shown in Figure 3.
The AD5220 powers ON in a centered wiper position exhibit-
ing nearly equal resistances of R
DIGITAL INTERFACING OPERATION
The AD5220 contains a three-wire serial input interface. The
three inputs are clock (CLK), CS and UP/DOWN (U/D). The
negative-edge sensitive CLK input requires clean transitions to
avoid clocking multiple pulses into the internal UP/DOWN
counter register, see Figure 35. Standard logic families work
well. If mechanical switches are used for product evaluation
they should be debounced by a flip-flop or other suitable
means. When CS is taken active low the clock begins to incre-
ment or decrement the internal UP/DOWN counter dependent
upon the state of the U/D control pin. The UP/DOWN counter
value (D) starts at 40
pulse will increment the value of the internal counter by one
LSB until the full scale value of 3F
U/D pin is logic high. If the U/D pin is taken to logic low the
counter will count down stopping at code 00
Additional clock pulses on the CLK pin are ignored when the
wiper is at either the 00
All digital inputs (CS, U/D, CLK) are protected with a series
input resistor and parallel Zener ESD structure shown in
Figure 36.
Figure 37. Equivalent ESD Protection Analog Pins
Figure 36. Equivalent ESD Protection Digital Pins
CLK
U/D
CS
Figure 35. Block Diagram
EN
POR
H
40
A, B, W
H
at system power ON. Each new CLK
H
GND
position or the 3F
1k
DOWN
CNTR
UP/
RS
20
WA
7
AD5220
LOGIC
O
H
D
E
C
D
E
and R
is reached as long as the
WB
H
.
H
position.
V
A
W
B
GND
(zero-scale).
DD
–8–
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between terminals A and
B is available with values of 10 k , 50 k , and 100 k . The
final three characters of the part number determine the nominal
resistance value, e.g., 10 k =10; 50 k = 50; 100 k = 100.
The nominal resistance (R
accessed by the wiper terminal, plus the B terminal contact. At
power ON the resistance from the wiper to either end Terminal
A or B is approximately equal. Clocking the CLK pin will in-
crease the resistance from the Wiper W to Terminal B by one
unit of R
determined by the number of pulses applied to the clock pin.
Each segment of the internal resistor string has a nominal resis-
tance value of R
the 10 k AD5220BN10 product. Care should be taken to limit
the current flow between W and B in the direct contact state to
a maximum value of 5 mA to avoid degradation or possible de-
struction of the internal switch contact.
Like the mechanical potentiometer the RDAC replaces, it is
totally symmetrical (see Figure 38). The resistance between the
Wiper W and Terminal A also produces a digitally controlled
resistance R
should be tied to the wiper.
The typical part-to-part distribution of R
dent having a 30% variation. The change in R
ture has a 800 ppm/ C temperature coefficient.
The R
grammed near the B-terminal due to the larger percentage con-
tribution of the wiper contact switch resistance, which has a
0.5%/ C temperature coefficient. Figure 14 shows the effect of
the wiper contact resistance as a function of code setting. An-
other performance factor influenced by the switch contact resis-
tance is the relative linearity error performance between the
10 k , and the 50 k or 100 k versions. The same switch
contact resistance is used in all three versions. Thus the perfor-
mance of the 50 k and 100 k devices which have the least
impact on wiper switch resistance exhibits the best linearity
error, see Figures 7 and 8.
BA
Figure 38. AD5220 Equivalent RDAC Circuit
S
temperature coefficient increases as the wiper is pro-
resistance (see Figure 38). The resistance R
WA
. When these terminals are used the B–terminal
S
= R
UP/DOWN
DECODE
RDAC
CNTR
D0
D1
D2
D3
D4
D5
D6
&
AB
/128, which becomes 78
AB
R
R
) of the VR has 128 contact points
R
R
S
S
S
S
= R
NOMINAL
/128
BA
is process lot depen-
Ax
Wx
Bx
BA
with tempera-
in the case of
WB
REV.
is
A