AD5253BRUZ100 Analog Devices Inc, AD5253BRUZ100 Datasheet - Page 15

• Manufacturer Part Number: AD5253BRUZ100
• Description: IC,Digital Potentiometer,CMOS,TSSOP,20PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD5253BRUZ100

• Taps: 64
• Resistance (ohms): 100K
• Number Of Circuits: 4
• Temperature Coefficient: 650 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Resistance In Ohms: 100K
• Number Of Elements: 4
• # Of Taps: 64
• Resistance (max): 100KOhm
• Power Supply Requirement: Single/Dual
• Interface Type: Serial (2-Wire/I2C)
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): ±2.5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): ±2.25V
• Dual Supply Voltage (max): ±2.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
S = start condition
P = stop condition
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
AD1, AD0 = I
R/ W = read enable bit at logic high; write enable bit at logic low
CMD/ REG = command enable bit at logic high; register access bit at logic low
EE/ RDAC = EEMEM register at logic high; RDAC register at logic low
A4, A3, A2, A1, A0 = RDAC/EEMEM register addresses
Table 6. Addresses for Writing Data Byte Contents to RDAC Registers (R/ W = 0, CMD/ REG = 0, EE/ RDAC = 0)
A4
0
0
0
0
0
:
:
0
2
C INTERFACE DETAIL DESCRIPTION
From Master to Slave
From Slave to Master
A3
0
0
0
0
0
:
:
1
2
C device address bits, must match with the logic states at Pins AD1, AD0
S
A2
0
0
0
0
1
:
:
1
0
1
SLAVE ADDRESS
S
0
0
1
1
SLAVE ADDRESS
A1
0
0
1
1
0
:
:
1
1
0
A
D
1
1
A
D
0
0 WRITE
1
0
A
D
1
A0
0
1
0
1
0
:
:
1
A
A
D
0
0 WRITE
0 REG
CMD/
REG
0
Figure 28. Consecutive Write Mode
A
Figure 27. Single Write Mode
0
0 REG
CMD/
REG
RDAC
RDAC0
RDAC1
RDAC2
RDAC3
Reserved
:
:
Reserved
Rev. B | Page 15 of 32
INSTRUCTIONS
AND ADDRESS
RDAC
EE/
0
INSTRUCTIONS
A
4
AND ADDRESS
RDAC
EE/
A
3
A
2
A
4
A
1
A
3
A
0
A
2
A
A
1
Data Byte Description
6-/8-bit wiper setting (2 MSB of AD5253 are X)
6-/8-bit wiper setting (2 MSB of AD5253 are X)
6-/8-bit wiper setting (2 MSB of AD5253 are X)
6-/8-bit wiper setting (2 MSB of AD5253 are X)
A
0
RDAC_N
DATA
A
ACKNOWLEDGE)
ACKNOWLEDGE)
(N BYTE +
(1 BYTE +
DATA
A
RDAC_N + 1
DATA
A/
A
P
A/
A
AD5253/AD5254
P