AD5331BRUZ-REEL7 Analog Devices Inc, AD5331BRUZ-REEL7 Datasheet
AD5331BRUZ-REEL7
Specifications of AD5331BRUZ-REEL7
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AD5331BRUZ-REEL7 Summary of contents
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FEATURES AD5330: single 8-bit DAC in 20-lead TSSOP AD5331: single 10-bit DAC in 20-lead TSSOP AD5340: single 12-bit DAC in 24-lead TSSOP AD5341: single 12-bit DAC in 20-lead TSSOP Low power operation: 115 μ 140 μA @ ...
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AD5330/AD5331/AD5340/AD5341 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Characteristics ........................................................................ 4 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings ............................................................ 6 ESD ...
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SPECIFICATIONS kΩ to GND REF L Table 1. 1 Parameter Min DC PERFORMANCE 3, 4 AD5330 Resolution Relative Accuracy Differential Nonlinearity AD5331 Resolution Relative ...
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AD5330/AD5331/AD5340/AD5341 1 Parameter Min POWER REQUIREMENTS V 2 (Normal Mode (Power-Down Mode 4 5.5 V ...
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TIMING CHARACTERISTICS 5.5 V, all specifications T DD Table 3. Parameter Limit MIN MAX 4.5 ...
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AD5330/AD5331/AD5340/AD5341 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND DD Digital Input Voltage to GND Digital Output Voltage to GND Reference Input Voltage to GND V to GND OUT Operating Temperature Range ...
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS POWER-ON RESET BUF 1 INPUT GAIN 8 REGISTER RESET 9 CLR 10 LDAC Figure 3. AD5330 Functional Block Diagram Table 5. AD5330 Pin ...
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AD5330/AD5331/AD5340/AD5341 POWER-ON RESET INPUT GAIN 8 REGISTER RESET 9 CLR LDAC 10 Figure 5. AD5331 Functional Block Diagram Table 6. AD5331 Pin ...
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POWER-ON RESET BUF 3 INPUT GAIN 10 REGISTER RESET CLR 11 LDAC 12 Figure 7. AD5340 Functional Block Diagram Table 7. AD5340 ...
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AD5330/AD5331/AD5340/AD5341 POWER-ON RESET HIGH BYTE REGISTER BUF 2 GAIN LOW BYTE REGISTER HBEN RESET 7 WR CLR 9 LDAC 10 Figure 9. AD5341 Functional Block Diagram Table 8. ...
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TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or INL is a measure of the maximum deviation, in LSBs, from a straight line passing through the actual endpoints of the DAC transfer function. Typical INL vs. ...
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AD5330/AD5331/AD5340/AD5341 Offset Error Drift This is a measure of the change in offset error with changes in temperature expressed in (ppm of full-scale range)/°C. Gain Error Drift This is a measure of the change in gain error with ...
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TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 14. AD5330 Typical INL Plot 25° –1 ...
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AD5330/AD5331/AD5340/AD5341 1. 25° 0.75 0.50 0.25 MAX INL MAX DNL 0 MIN DNL –0.25 MIN INL –0.50 –0.75 –1. (V) REF Figure 20. AD5330 INL and DNL Error vs. V ...
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T = 25°C A 200 100 0 2.5 3.0 3.5 4.0 4.5 V (V) DD Figure 26. Supply Current vs. Supply Voltage 0 25°C A 0.4 0.3 0.2 0.1 0 2.5 3.0 3.5 4.0 4.5 V (V) ...
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AD5330/AD5331/AD5340/AD5341 100 110 120 130 140 150 160 170 I (µA) DD Figure 32. I Histogram with and 0.917 0.916 0.915 0.914 0.913 0.912 0.911 0.910 0.909 ...
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THEORY OF OPERATION The AD5330/AD5331/AD5340/AD5341 are single resistor- string DACs fabricated on a CMOS process with resolutions of 8, 10, and 12 bits, respectively. They are written to using a parallel interface. They operate from single supplies of 2.5 V ...
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AD5330/AD5331/AD5340/AD5341 PARALLEL INTERFACE The AD5330, AD5331, and AD5340 load their data as a single 8-, 10-, or 12-bit word, while the AD5341 loads data as a low byte of eight bits and a high byte containing four bits. DOUBLE-BUFFERED INTERFACE ...
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POWER-DOWN MODE The AD5330/AD5331/AD5340/AD5341 have low power consumption, dissipating only 0.35 mW with supply and 0.7 mW with supply. Power consumption can be further reduced when the DAC is not in use by putting ...
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AD5330/AD5331/AD5340/AD5341 SUGGESTED DATABUS FORMATS In most applications, GAIN and BUF are hard-wired. However, if more flexibility is required, they can be included in a databus. This enables the user to software program GAIN, giving the option of doubling the resolution ...
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APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUITS The AD5330/AD5331/AD5340/AD5341 can be used with a wide range of reference voltages, especially if the reference inputs are configured to be unbuffered, in which case the devices offer full, one-quadrant multiplying capability over a reference ...
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AD5330/AD5331/AD5340/AD5341 a system, all the DACs can be updated simultaneously using a common LDAC line. A common CLR line can also be used to reset all DAC outputs to zero. HBEN* WR LDAC CLR 1Y0 ENABLE ...
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Table 11. Overview of AD53xx Parallel Devices Part No. Resolution Bits DNL No Singles AD5330 8 ±0.25 1 AD5331 10 ±0.5 1 AD5340 12 ±1.0 1 AD5341 12 ±1.0 1 Duals AD5332 8 ±0.25 2 AD5333 10 ±0.5 ...
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AD5330/AD5331/AD5340/AD5341 OUTLINE DIMENSIONS COPLANARITY 0.15 0.05 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.20 0.05 0.09 0.30 0.19 SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 48. ...
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... AD5331BRU-REEL7 –40°C to +105°C 1 AD5331BRUZ –40°C to +105°C 1 AD5331BRUZ-REEL –40°C to +105°C 1 AD5331BRUZ-REEL7 –40°C to +105°C AD5340BRU –40°C to +105°C AD5340BRU-REEL –40°C to +105°C AD5340BRU-REEL7 –40°C to +105°C AD5340BRUZ 1 –40°C to +105°C ...
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AD5330/AD5331/AD5340/AD5341 NOTES Rev Page ...
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NOTES AD5330/AD5331/AD5340/AD5341 Rev Page ...
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AD5330/AD5331/AD5340/AD5341 NOTES ©2000–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06852-0-2/08(A) Rev Page ...